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authorJim Grosbach <grosbach@apple.com>2010-09-03 21:45:15 +0000
committerJim Grosbach <grosbach@apple.com>2010-09-03 21:45:15 +0000
commit005155e236afd14f9cc1342a213f050287e9bb26 (patch)
treed25b4c22700ff0d2ad2e8e18e8d90bd56849ff12
parent9d798d13f3e5b089ba4426e4f26367eb1cbb4bb2 (diff)
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previous patch was a little too tricky for its own good. Don't try to
overload UserInInstr. Explicitly check Allocatable. The early exit in the condition will mean the performance impact of the extra test should be minimal. llvm-svn: 113016
-rw-r--r--llvm/lib/CodeGen/RegAllocFast.cpp15
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index 3cf1d72..fc150d5 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -113,9 +113,6 @@ namespace {
// Allocatable - vector of allocatable physical registers.
BitVector Allocatable;
- // Reserved - vector of reserved physical registers.
- BitVector Reserved;
-
// SkippedInstrs - Descriptors of instructions whose clobber list was
// ignored because all registers were spilled. It is still necessary to
// mark all the clobbered registers as used by the function.
@@ -501,7 +498,8 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
// First try to find a completely free register.
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
unsigned PhysReg = *I;
- if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg))
+ if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg) &&
+ Allocatable.test(PhysReg))
return assignVirtToPhysReg(LRE, PhysReg);
}
@@ -510,6 +508,8 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
unsigned BestReg = 0, BestCost = spillImpossible;
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
+ if (!Allocatable.test(*I))
+ continue;
unsigned Cost = calcSpillCost(*I);
// Cost is 0 when all aliases are already disabled.
if (Cost == 0)
@@ -712,7 +712,7 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
}
// Restore UsedInInstr to a state usable for allocating normal virtual uses.
- UsedInInstr = Reserved;
+ UsedInInstr.reset();
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || (MO.isDef() && !MO.isEarlyClobber())) continue;
@@ -838,7 +838,7 @@ void RAFast::AllocateBasicBlock() {
}
// Track registers used by instruction.
- UsedInInstr = Reserved;
+ UsedInInstr.reset();
// First scan.
// Mark physreg uses and early clobbers as used.
@@ -916,7 +916,7 @@ void RAFast::AllocateBasicBlock() {
// Track registers defined by instruction - early clobbers and tied uses at
// this point.
- UsedInInstr = Reserved;
+ UsedInInstr.reset();
if (hasEarlyClobbers) {
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
@@ -1014,7 +1014,6 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
UsedInInstr.resize(TRI->getNumRegs());
Allocatable = TRI->getAllocatableSet(*MF);
- Reserved = TRI->getReservedRegs(*MF);
// initialize the virtual->physical register map to have a 'null'
// mapping for all virtual registers