diff options
author | Sanjay Patel <spatel@rotateright.com> | 2021-02-28 10:17:10 -0500 |
---|---|---|
committer | Tom Stellard <tstellar@redhat.com> | 2021-03-02 20:02:46 -0800 |
commit | 692808e5af8338f5a109a64b5b9d75d05ec6f590 (patch) | |
tree | 2186f5c518a14ba33a814b71dc58c9c53a736066 | |
parent | c637d4d136fd476d4a7418f5ecb76b80bcb6f8fc (diff) | |
download | llvm-692808e5af8338f5a109a64b5b9d75d05ec6f590.zip llvm-692808e5af8338f5a109a64b5b9d75d05ec6f590.tar.gz llvm-692808e5af8338f5a109a64b5b9d75d05ec6f590.tar.bz2 |
[InstCombine] avoid infinite loop in demanded bits for select
https://llvm.org/PR49205
(cherry picked from commit 9502061bcc86982641772f45b7e7a0eb7437f054)
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 8 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/select-imm-canon.ll | 38 |
2 files changed, 44 insertions, 2 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index c265516..16efe86 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -345,10 +345,14 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, return false; // Get the constant out of the ICmp, if there is one. + // Only try this when exactly 1 operand is a constant (if both operands + // are constant, the icmp should eventually simplify). Otherwise, we may + // invert the transform that reduces set bits and infinite-loop. + Value *X; const APInt *CmpC; ICmpInst::Predicate Pred; - if (!match(I->getOperand(0), m_c_ICmp(Pred, m_APInt(CmpC), m_Value())) || - CmpC->getBitWidth() != SelC->getBitWidth()) + if (!match(I->getOperand(0), m_ICmp(Pred, m_Value(X), m_APInt(CmpC))) || + isa<Constant>(X) || CmpC->getBitWidth() != SelC->getBitWidth()) return ShrinkDemandedConstant(I, OpNo, DemandedMask); // If the constant is already the same as the ICmp, leave it as-is. diff --git a/llvm/test/Transforms/InstCombine/select-imm-canon.ll b/llvm/test/Transforms/InstCombine/select-imm-canon.ll index e230b3b..fec6d69 100644 --- a/llvm/test/Transforms/InstCombine/select-imm-canon.ll +++ b/llvm/test/Transforms/InstCombine/select-imm-canon.ll @@ -87,3 +87,41 @@ define i8 @original_logical(i32 %A, i32 %B) { %conv7 = trunc i32 %spec.select.i to i8 ret i8 %conv7 } + +; This would infinite loop because we have potentially opposing +; constant transforms on degenerate (unsimplified) cmps. + +define i32 @PR49205(i32 %t0, i1 %b) { +; CHECK-LABEL: @PR49205( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[FOR_COND:%.*]] +; CHECK: for.cond: +; CHECK-NEXT: br i1 [[B:%.*]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body: +; CHECK-NEXT: br label [[FOR_COND]] +; CHECK: for.end: +; CHECK-NEXT: ret i32 1 +; +entry: + br label %for.cond + +for.cond: + %s = phi i32 [ 7, %entry ], [ %add, %for.body ] + br i1 %b, label %for.body, label %for.end + +for.body: + %div = add i32 %t0, undef + %add = add nsw i32 %div, 1 + br label %for.cond + +for.end: + %cmp6 = icmp ne i32 %s, 4 + %conv = zext i1 %cmp6 to i32 + %and7 = and i32 %s, %conv + %sub = sub i32 %s, %and7 + %cmp9 = icmp ne i32 %sub, 4 + %conv10 = zext i1 %cmp9 to i32 + %sub11 = sub i32 %conv10, %sub + %and = and i32 %sub11, 1 + ret i32 %and +} |