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| author | Kai Luo <lkail@cn.ibm.com> | 2020-07-17 08:36:30 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@chromium.org> | 2020-07-22 15:58:00 +0200 |
| commit | ba5bbd4bd00f8aacf379cdcb738b149a1f63166a (patch) | |
| tree | d45d859ff04a79d526a08daeba1b09e6e2196757 | |
| parent | 764e28231e4b3b04748ac1c85576402bb76919de (diff) | |
| download | llvm-ba5bbd4bd00f8aacf379cdcb738b149a1f63166a.zip llvm-ba5bbd4bd00f8aacf379cdcb738b149a1f63166a.tar.gz llvm-ba5bbd4bd00f8aacf379cdcb738b149a1f63166a.tar.bz2 | |
[PowerPC] Precommit test case for PR46759. NFC.
(cherry picked from commit 817767abeec8343b20de83f8b1b2c8c20bbbe00a)
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/pr46759.ll | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/pr46759.ll b/llvm/test/CodeGen/PowerPC/pr46759.ll new file mode 100644 index 0000000..2c0af89 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/pr46759.ll @@ -0,0 +1,58 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \ +; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \ +; RUN: -check-prefix=CHECK-LE %s + +define void @foo(i32 %vla_size) #0 { +; CHECK-LE-LABEL: foo: +; CHECK-LE: # %bb.0: # %entry +; CHECK-LE-NEXT: std r31, -8(r1) +; CHECK-LE-NEXT: std r30, -16(r1) +; CHECK-LE-NEXT: mr r30, r1 +; CHECK-LE-NEXT: mr r12, r1 +; CHECK-LE-NEXT: .cfi_def_cfa r12, 0 +; CHECK-LE-NEXT: clrldi r0, r12, 53 +; CHECK-LE-NEXT: stdux r12, r1, r0 +; CHECK-LE-NEXT: stdu r12, -2048(r1) +; CHECK-LE-NEXT: stdu r12, -4096(r1) +; CHECK-LE-NEXT: .cfi_def_cfa_register r1 +; CHECK-LE-NEXT: .cfi_def_cfa_register r30 +; CHECK-LE-NEXT: .cfi_offset r31, -8 +; CHECK-LE-NEXT: .cfi_offset r30, -16 +; CHECK-LE-NEXT: clrldi r3, r3, 32 +; CHECK-LE-NEXT: li r6, -4096 +; CHECK-LE-NEXT: ld r4, 0(r1) +; CHECK-LE-NEXT: mr r31, r1 +; CHECK-LE-NEXT: addi r3, r3, 15 +; CHECK-LE-NEXT: rldicl r3, r3, 60, 4 +; CHECK-LE-NEXT: rldicl r3, r3, 4, 31 +; CHECK-LE-NEXT: neg r5, r3 +; CHECK-LE-NEXT: li r3, -2048 +; CHECK-LE-NEXT: divd r7, r5, r6 +; CHECK-LE-NEXT: and r3, r5, r3 +; CHECK-LE-NEXT: add r3, r1, r3 +; CHECK-LE-NEXT: mulld r6, r7, r6 +; CHECK-LE-NEXT: sub r5, r5, r6 +; CHECK-LE-NEXT: stdux r4, r1, r5 +; CHECK-LE-NEXT: cmpd r1, r3 +; CHECK-LE-NEXT: beq cr0, .LBB0_2 +; CHECK-LE-NEXT: .LBB0_1: # %entry +; CHECK-LE-NEXT: # +; CHECK-LE-NEXT: stdu r4, -4096(r1) +; CHECK-LE-NEXT: cmpd r1, r3 +; CHECK-LE-NEXT: bne cr0, .LBB0_1 +; CHECK-LE-NEXT: .LBB0_2: # %entry +; CHECK-LE-NEXT: addi r3, r1, 2048 +; CHECK-LE-NEXT: lbz r3, 0(r3) +; CHECK-LE-NEXT: ld r1, 0(r1) +; CHECK-LE-NEXT: ld r31, -8(r1) +; CHECK-LE-NEXT: ld r30, -16(r1) +; CHECK-LE-NEXT: blr +entry: + %0 = zext i32 %vla_size to i64 + %vla = alloca i8, i64 %0, align 2048 + %1 = load volatile i8, i8* %vla, align 2048 + ret void +} + +attributes #0 = { "probe-stack"="inline-asm" } |