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BranchCommit messageAuthorAge
main[RISCV] Simplify some code in unpackFromMemLoc. NFCCraig Topper82 min.
users/alexey-bataev/spr/slpinitial-support-for-non-power-of-2-but-still-whole-register-number-of-elements-in-operands-1Rebase, address commentsAlexey Bataev8 hours
users/arsenm/amdgpu-add-noalias-addrspace-autoupgrade-atomic-intrinsicsAMDGPU: Add noalias.addrspace metadata when autoupgrading atomic intrinsicsMatt Arsenault13 hours
users/arsenm/noalias-addrspace-metadataAdd another commentMatt Arsenault11 hours
users/bogner/sprdirectx-lower-llvmdxtypedbufferload-to-dxil-opsRework to match llvm/wg-hlsl#59Justin Bogner4 hours
users/bogner/sprmain.directx-lower-llvmdxtypedbufferload-to-dxil-ops[𝘀𝗽𝗿] changes introduced through rebaseMircea Trofin4 hours
users/chbarto/test_onedllset the C runtime linkage to /MD only for sanitizer_common, interception, and...Charlie Barto11 hours
users/krzysz00/nvvm-range-plumbing[mlir][GPU] Plumb range information through the NVVM lowteringsKrzysztof Drewniak5 hours
users/krzysz00/refactor-range-attributes-rocdl[mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsicsKrzysztof Drewniak5 hours
users/mtrofin/09-05-_ctx_prof_insert_the_ctx_prof_flattener_after_the_module_inliner[ctx_prof] Insert the ctx prof flattener after the module inlinerMircea Trofin87 min.
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TagDownloadAuthorAge
llvmorg-19.1.0-rc4llvmorg-19.1.0-rc4.zip  llvmorg-19.1.0-rc4.tar.gz  llvmorg-19.1.0-rc4.tar.bz2  Tobias Hieta4 days
llvmorg-19.1.0-rc3llvmorg-19.1.0-rc3.zip  llvmorg-19.1.0-rc3.tar.gz  llvmorg-19.1.0-rc3.tar.bz2  Tobias Hieta3 weeks
llvmorg-19.1.0-rc2llvmorg-19.1.0-rc2.zip  llvmorg-19.1.0-rc2.tar.gz  llvmorg-19.1.0-rc2.tar.bz2  Tobias Hieta5 weeks
llvmorg-19.1.0-rc1llvmorg-19.1.0-rc1.zip  llvmorg-19.1.0-rc1.tar.gz  llvmorg-19.1.0-rc1.tar.bz2  Tobias Hieta6 weeks
llvmorg-20-initllvmorg-20-init.zip  llvmorg-20-init.tar.gz  llvmorg-20-init.tar.bz2  Tobias Hieta7 weeks
llvmorg-18.1.8llvmorg-18.1.8.zip  llvmorg-18.1.8.tar.gz  llvmorg-18.1.8.tar.bz2  Tom Stellard3 months
llvmorg-18.1.7llvmorg-18.1.7.zip  llvmorg-18.1.7.tar.gz  llvmorg-18.1.7.tar.bz2  Tom Stellard3 months
llvmorg-18.1.6llvmorg-18.1.6.zip  llvmorg-18.1.6.tar.gz  llvmorg-18.1.6.tar.bz2  Tom Stellard4 months
llvmorg-18.1.5llvmorg-18.1.5.zip  llvmorg-18.1.5.tar.gz  llvmorg-18.1.5.tar.bz2  Tom Stellard4 months
llvmorg-18.1.4llvmorg-18.1.4.zip  llvmorg-18.1.4.tar.gz  llvmorg-18.1.4.tar.bz2  Tom Stellard5 months
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AgeCommit messageAuthorFilesLines
2024-06-21[𝘀𝗽𝗿] initial versionusers/fmayer/spr/mte-add-option-to-disable-uas-for-memtag-stackFlorian Mayer1-1/+6
2024-06-18Reland "[AArch64] Decouple feature dependency expansion. (#94279)" (#95519)Alexandros Lamprineas15-237/+239
2024-06-18[Flang]Fix for changed code at the end of AllocaIP. (#92430)Mats Petersson7-109/+174
2024-06-18[flang][cuda] Relax cuf.data_transfer verifier (#95974)Valentin Clement (バレンタイン クレメン)2-2/+20
2024-06-18[flang] Handle procedure pointer and dummy procecure in REDUCE intrinsic call...Valentin Clement (バレンタイン クレメン)2-2/+38
2024-06-18[ProfileData] Clean up validateRecord (#95488)Kazu Hirata1-7/+4
2024-06-18[flang] Fold IEEE_SUPPORT_xxx() intrinsic functions (#95866)Peter Klausler18-334/+498
2024-06-18[flang] Fix crash due to overly broad assertion (#95809)Peter Klausler2-5/+9
2024-06-18[BOLT] Skip optimization of functions with alt instructions (#95172)Maksim Panchenko2-15/+13
2024-06-18[LLVM] Add option to store Parent-pointer in ilist_node_base (#94224)Stephen Tozer15-63/+345
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