aboutsummaryrefslogtreecommitdiff
BranchCommit messageAuthorAge
main[RISCV] Simplify some code in unpackFromMemLoc. NFCCraig Topper29 min.
users/alexey-bataev/spr/slpinitial-support-for-non-power-of-2-but-still-whole-register-number-of-elements-in-operands-1Rebase, address commentsAlexey Bataev7 hours
users/arsenm/amdgpu-add-noalias-addrspace-autoupgrade-atomic-intrinsicsAMDGPU: Add noalias.addrspace metadata when autoupgrading atomic intrinsicsMatt Arsenault12 hours
users/arsenm/noalias-addrspace-metadataAdd another commentMatt Arsenault10 hours
users/bogner/sprdirectx-lower-llvmdxtypedbufferload-to-dxil-opsRework to match llvm/wg-hlsl#59Justin Bogner3 hours
users/bogner/sprmain.directx-lower-llvmdxtypedbufferload-to-dxil-ops[𝘀𝗽𝗿] changes introduced through rebaseMircea Trofin3 hours
users/chbarto/test_onedllset the C runtime linkage to /MD only for sanitizer_common, interception, and...Charlie Barto10 hours
users/krzysz00/nvvm-range-plumbing[mlir][GPU] Plumb range information through the NVVM lowteringsKrzysztof Drewniak4 hours
users/krzysz00/refactor-range-attributes-rocdl[mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsicsKrzysztof Drewniak4 hours
users/mtrofin/09-05-_ctx_prof_insert_the_ctx_prof_flattener_after_the_module_inliner[ctx_prof] Insert the ctx prof flattener after the module inlinerMircea Trofin33 min.
[...]
 
TagDownloadAuthorAge
llvmorg-19.1.0-rc4llvmorg-19.1.0-rc4.zip  llvmorg-19.1.0-rc4.tar.gz  llvmorg-19.1.0-rc4.tar.bz2  Tobias Hieta4 days
llvmorg-19.1.0-rc3llvmorg-19.1.0-rc3.zip  llvmorg-19.1.0-rc3.tar.gz  llvmorg-19.1.0-rc3.tar.bz2  Tobias Hieta3 weeks
llvmorg-19.1.0-rc2llvmorg-19.1.0-rc2.zip  llvmorg-19.1.0-rc2.tar.gz  llvmorg-19.1.0-rc2.tar.bz2  Tobias Hieta5 weeks
llvmorg-19.1.0-rc1llvmorg-19.1.0-rc1.zip  llvmorg-19.1.0-rc1.tar.gz  llvmorg-19.1.0-rc1.tar.bz2  Tobias Hieta6 weeks
llvmorg-20-initllvmorg-20-init.zip  llvmorg-20-init.tar.gz  llvmorg-20-init.tar.bz2  Tobias Hieta7 weeks
llvmorg-18.1.8llvmorg-18.1.8.zip  llvmorg-18.1.8.tar.gz  llvmorg-18.1.8.tar.bz2  Tom Stellard3 months
llvmorg-18.1.7llvmorg-18.1.7.zip  llvmorg-18.1.7.tar.gz  llvmorg-18.1.7.tar.bz2  Tom Stellard3 months
llvmorg-18.1.6llvmorg-18.1.6.zip  llvmorg-18.1.6.tar.gz  llvmorg-18.1.6.tar.bz2  Tom Stellard4 months
llvmorg-18.1.5llvmorg-18.1.5.zip  llvmorg-18.1.5.tar.gz  llvmorg-18.1.5.tar.bz2  Tom Stellard4 months
llvmorg-18.1.4llvmorg-18.1.4.zip  llvmorg-18.1.4.tar.gz  llvmorg-18.1.4.tar.bz2  Tom Stellard5 months
[...]
 
AgeCommit messageAuthorFilesLines
2024-02-29Rebase, Address commentsusers/alexey-bataev/spr/ttiriscvimprove-costs-for-fixed-vector-whole-reg-extractinsertAlexey Bataev577-7369/+11179
2024-02-29[RISCV] Enable PostRAScheduler for SiFive7 (#83166)Michael Maitland3-36/+37
2024-02-29[X86] matchAddressRecursively - ensure dead nodes are replaced before matchin...RicoAfoat2-4/+33
2024-02-29[NFC][RemoveDIs] Add bodies for inst-constructors taking iteratorsJeremy Morse2-0/+138
2024-02-29[DebugInfo][RemoveDIs] Fix incorrect test expectStephen Tozer1-1/+1
2024-02-29AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (#83426)Petar Avramovic4-71/+9
2024-02-29[DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by find...Stephen Tozer2-3/+11
2024-02-29[lldb][test] Clear pexpect found var before checking againDavid Spickett1-0/+1
2024-02-29[DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op rec...S. Bharadwaj Yadavalli5-373/+413
2024-02-29[Clang][Sema]: Diagnose lambda to bool implicit casts (#83152)Vinayak Dev6-6/+34
[...]
generated by cgit v1.1 at 2024-09-07 03:43:40 +0000