From d0adc9223031b606c3c7781b4ec41462796ab313 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sun, 18 Mar 2012 15:51:53 -0700 Subject: i386/x86_64: Optimize feholdexcept. --- sysdeps/i386/fpu/feholdexcpt.c | 19 ++++--------------- sysdeps/x86_64/fpu/feholdexcpt.c | 21 +++++++-------------- 2 files changed, 11 insertions(+), 29 deletions(-) (limited to 'sysdeps') diff --git a/sysdeps/i386/fpu/feholdexcpt.c b/sysdeps/i386/fpu/feholdexcpt.c index a09d45e..7e10389 100644 --- a/sysdeps/i386/fpu/feholdexcpt.c +++ b/sysdeps/i386/fpu/feholdexcpt.c @@ -1,6 +1,5 @@ /* Store current floating-point environment and clear exceptions. - Copyright (C) 1997, 1999, 2003, 2004, 2005, 2007 - Free Software Foundation, Inc. + Copyright (C) 1997-2012 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper , 1997. @@ -26,19 +25,9 @@ int feholdexcept (fenv_t *envp) { - fenv_t temp; - - /* Store the environment. */ - __asm__ ("fnstenv %0" : "=m" (temp)); - *envp = temp; - - /* Now set all exceptions to non-stop. */ - temp.__control_word |= 0x3f; - - /* And clear all exceptions. */ - temp.__status_word &= ~0x3f; - - __asm__ ("fldenv %0" : : "m" (temp)); + /* Store the environment. Recall that fnstenv has a side effect of + masking all exceptions. Then clear all exceptions. */ + __asm__ volatile ("fnstenv %0; fnclex" : "=m" (*envp)); /* If the CPU supports SSE we set the MXCSR as well. */ if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) diff --git a/sysdeps/x86_64/fpu/feholdexcpt.c b/sysdeps/x86_64/fpu/feholdexcpt.c index b547b34..b380479 100644 --- a/sysdeps/x86_64/fpu/feholdexcpt.c +++ b/sysdeps/x86_64/fpu/feholdexcpt.c @@ -1,5 +1,5 @@ /* Store current floating-point environment and clear exceptions. - Copyright (C) 2001, 2005, 2007 Free Software Foundation, Inc. + Copyright (C) 2001-2012 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -22,20 +22,13 @@ int feholdexcept (fenv_t *envp) { unsigned int mxcsr; - fenv_t temp; - /* Store the environment. */ - __asm__ ("fnstenv %0\n" - "stmxcsr %1" : "=m" (temp), "=m" (temp.__mxcsr)); - *envp = temp; - - /* Now set all exceptions to non-stop, first the x87 FPU. */ - temp.__control_word |= 0x3f; - - /* And clear all exceptions. */ - temp.__status_word &= ~0x3f; - - __asm__ ("fldenv %0" : : "m" (temp)); + /* Store the environment. Recall that fnstenv has a side effect of + masking all exceptions. Then clear all exceptions. */ + __asm__ ("fnstenv %0\n\t" + "stmxcsr %1\n\t" + "fnclex" + : "=m" (*envp), "=m" (envp->__mxcsr)); /* Set the SSE MXCSR register. */ mxcsr = (envp->__mxcsr | 0x1f80) & ~0x3f; -- cgit v1.1