From 46ed103824ff42668ddfc36c1b3fdb9219d48eee Mon Sep 17 00:00:00 2001
From: Liubov Dmitrieva <ldmitrie@sourceware.org>
Date: Wed, 21 Aug 2013 18:24:44 +0400
Subject: i686: Skip SSE4_2 version for strcmp, strncmp, strncase, strcasecmp
 if bit_Slow_SSE4_2 is set.

---
 sysdeps/i386/i686/multiarch/strcasecmp.S | 4 ++++
 sysdeps/i386/i686/multiarch/strcmp.S     | 4 ++++
 sysdeps/i386/i686/multiarch/strncase.S   | 4 ++++
 3 files changed, 12 insertions(+)

(limited to 'sysdeps/i386')

diff --git a/sysdeps/i386/i686/multiarch/strcasecmp.S b/sysdeps/i386/i686/multiarch/strcasecmp.S
index 2444af2..25de4da 100644
--- a/sysdeps/i386/i686/multiarch/strcasecmp.S
+++ b/sysdeps/i386/i686/multiarch/strcasecmp.S
@@ -37,6 +37,8 @@ ENTRY(__strcasecmp)
 	leal	__strcasecmp_ssse3@GOTOFF(%ebx), %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+	jnz	2f
 	leal	__strcasecmp_sse4_2@GOTOFF(%ebx), %eax
 2:	popl	%ebx
 	cfi_adjust_cfa_offset (-4)
@@ -56,6 +58,8 @@ ENTRY(__strcasecmp)
 	leal	__strcasecmp_ssse3, %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+	jnz	2f
 	leal	__strcasecmp_sse4_2, %eax
 2:	ret
 END(__strcasecmp)
diff --git a/sysdeps/i386/i686/multiarch/strcmp.S b/sysdeps/i386/i686/multiarch/strcmp.S
index 7dc2cef..41dd3b3 100644
--- a/sysdeps/i386/i686/multiarch/strcmp.S
+++ b/sysdeps/i386/i686/multiarch/strcmp.S
@@ -68,6 +68,8 @@ ENTRY(STRCMP)
 	leal	__STRCMP_SSSE3@GOTOFF(%ebx), %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+	jnz	2f
 	leal	__STRCMP_SSE4_2@GOTOFF(%ebx), %eax
 2:	popl	%ebx
 	cfi_adjust_cfa_offset (-4)
@@ -87,6 +89,8 @@ ENTRY(STRCMP)
 	leal	__STRCMP_SSSE3, %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+	jnz	2f
 	leal	__STRCMP_SSE4_2, %eax
 2:	ret
 END(STRCMP)
diff --git a/sysdeps/i386/i686/multiarch/strncase.S b/sysdeps/i386/i686/multiarch/strncase.S
index 939cd96..de97e1b 100644
--- a/sysdeps/i386/i686/multiarch/strncase.S
+++ b/sysdeps/i386/i686/multiarch/strncase.S
@@ -37,6 +37,8 @@ ENTRY(__strncasecmp)
 	leal	__strncasecmp_ssse3@GOTOFF(%ebx), %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+	jnz	2f
 	leal	__strncasecmp_sse4_2@GOTOFF(%ebx), %eax
 2:	popl	%ebx
 	cfi_adjust_cfa_offset (-4)
@@ -56,6 +58,8 @@ ENTRY(__strncasecmp)
 	leal	__strncasecmp_ssse3, %eax
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
 	jz	2f
+	testl	$bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+	jnz	2f
 	leal	__strncasecmp_sse4_2, %eax
 2:	ret
 END(__strncasecmp)
-- 
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