From bd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c Mon Sep 17 00:00:00 2001 From: Rajalakshmi Srinivasaraghavan Date: Tue, 19 Sep 2017 13:55:49 +0530 Subject: powerpc: Avoid misaligned stores in memset As per the section "3.1.4.2 Alignment Interrupts" of the "POWER8 Processor User's Manual for the Single-Chip Module", alignment interrupt is reported for misaligned stores in Caching-inhibited storage. As memset is used in some drivers for DMA (like xorg), this patch avoids misaligned stores for sizes less than 8 in memset. --- ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'ChangeLog') diff --git a/ChangeLog b/ChangeLog index 757462f..25b05f2 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,7 @@ +2017-09-19 Rajalakshmi Srinivasaraghavan + + * sysdeps/powerpc/powerpc64/power8/memset.S: Avoid misaligned stores. + 2017-09-18 Joseph Myers * sysdeps/ieee754/ldbl-opt/w_exp10l_compat.c [LIBM_SVID_COMPAT && -- cgit v1.1