aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2016-06-06Count number of logical processors sharing L2 cachehjl/erms/2.23H.J. Lu1-34/+116
2016-06-06Remove special L2 cache case for Knights LandingH.J. Lu1-2/+0
2016-06-06Correct Intel processor level type mask from CPUIDH.J. Lu1-1/+1
2016-06-06Check the HTT bit before counting logical threadsH.J. Lu2-76/+85
2016-06-06Remove alignments on jump targets in memsetH.J. Lu1-32/+5
2016-06-06Call init_cpu_features only if SHARED is definedH.J. Lu2-0/+8
2016-06-06Support non-inclusive caches on Intel processorsH.J. Lu1-1/+11
2016-06-06Remove x86 ifunc-defines.sym and rtld-global-offsets.symH.J. Lu8-51/+18
2016-06-06Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu2-1/+1
2016-06-06Detect Intel Goldmont and Airmont processorsH.J. Lu1-0/+8
2016-04-08X86-64: Add dummy memcopy.h and wordcopy.cH.J. Lu2-0/+2
2016-04-08X86-64: Remove previous default/SSE2/AVX2 memcpy/memmoveH.J. Lu19-1490/+394
2016-04-08X86-64: Remove the previous SSE2/AVX2 memsetsH.J. Lu8-319/+60
2016-04-08X86-64: Use non-temporal store in memcpy on large dataH.J. Lu5-171/+234
2016-04-06X86-64: Prepare memmove-vec-unaligned-erms.SH.J. Lu1-54/+84
2016-04-06X86-64: Prepare memset-vec-unaligned-erms.SH.J. Lu1-13/+19
2016-04-05Force 32-bit displacement in memset-vec-unaligned-erms.SH.J. Lu1-0/+13
2016-04-05Add a comment in memset-sse2-unaligned-erms.SH.J. Lu1-0/+2
2016-04-05Don't put SSE2/AVX/AVX512 memmove/memset in ld.soH.J. Lu6-32/+40
2016-04-05Fix memmove-vec-unaligned-erms.SH.J. Lu1-24/+30
2016-04-02Remove Fast_Copy_Backward from Intel Core processorsH.J. Lu1-5/+1
2016-04-02Add x86-64 memset with unaligned store and rep stosbH.J. Lu6-1/+335
2016-04-02Add x86-64 memmove with unaligned load/store and rep movsbH.J. Lu6-1/+594
2016-04-02Initial Enhanced REP MOVSB/STOSB (ERMS) supportH.J. Lu1-0/+4
2016-04-02Make __memcpy_avx512_no_vzeroupper an aliasH.J. Lu3-430/+404
2016-04-02Implement x86-64 multiarch mempcpy in memcpyH.J. Lu9-57/+69
2016-04-02[x86] Add a feature bit: Fast_Unaligned_CopyH.J. Lu3-2/+17
2016-04-02tst-audit10: Fix compilation on compilers without bit_AVX512F [BZ #19860]Florian Weimer1-1/+4
2016-04-02Don't set %rcx twice before "rep movsb"H.J. Lu1-1/+0
2016-04-02Set index_arch_AVX_Fast_Unaligned_Load only for Intel processorsH.J. Lu2-74/+88
2016-04-02Add _arch_/_cpu_ to index_*/bit_* in x86 cpu-features.hH.J. Lu3-151/+159
2016-04-02Fix tst-audit10 build when -mavx512f is not supported.Roland McGrath2-3/+4
2016-04-02tst-audit4, tst-audit10: Compile AVX/AVX-512 code separately [BZ #19269]Florian Weimer5-55/+112
2016-04-02Group AVX512 functions in .text.avx512 sectionH.J. Lu2-2/+2
2016-04-02x86-64: Fix memcpy IFUNC selectionH.J. Lu1-13/+14
2016-04-01S390: Extend structs La_s390_regs / La_s390_retval with vector-registers.Stefan Liebler4-65/+136
2016-04-01S390: Save and restore fprs/vrs while resolving symbols.Stefan Liebler7-248/+516
2016-03-28resolv: Always set *resplen2 out parameter in send_dg [BZ #19791]Florian Weimer3-23/+50
2016-03-21math: don't clobber old libm.so on install [BZ #19822]Dylan Alex Simon3-1/+9
2016-03-20Fix resource leak in resolver (bug 19257)Andreas Schwab2-1/+7
2016-03-11Or bit_Prefer_MAP_32BIT_EXEC in EXTRA_LD_ENVVARSH.J. Lu3-1/+8
2016-03-11Define _HAVE_STRING_ARCH_mempcpy to 1 for x86H.J. Lu3-0/+9
2016-03-10Mention BZ #19762 in NEWSH.J. Lu1-0/+1
2016-03-10Use HAS_ARCH_FEATURE with Fast_Rep_StringH.J. Lu10-9/+27
2016-03-09mips: terminate the FDE before the return trampoline in makecontextAurelien Jarno3-0/+14
2016-03-08Add sys/auxv.h wrapper to include/sys/Aurelien Jarno2-0/+5
2016-03-07sln: use stat64Hongjiu Zhang2-2/+7
2016-02-26Update NEWS.Carlos O'Donell1-0/+11
2016-02-25NEWS (2.23): Fix typo in bug 19048 text.Carlos O'Donell2-1/+5
2016-02-25Don't use long double math functions if NO_LONG_DOUBLEAndreas Schwab2-1/+11
generated by cgit v1.1 at 2024-12-03 18:20:37 +0000