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-rw-r--r--sysdeps/powerpc/dl-machine.c24
-rw-r--r--sysdeps/powerpc/fclrexcpt.c4
-rw-r--r--sysdeps/powerpc/fesetround.c2
-rw-r--r--sysdeps/powerpc/feupdateenv.c2
-rw-r--r--sysdeps/powerpc/fraiseexcpt.c4
-rw-r--r--sysdeps/powerpc/fsetexcptflg.c6
-rw-r--r--sysdeps/powerpc/s_rint.c22
-rw-r--r--sysdeps/powerpc/s_rintf.c24
-rw-r--r--sysdeps/powerpc/w_sqrt.c6
-rw-r--r--sysdeps/powerpc/w_sqrtf.c6
10 files changed, 52 insertions, 48 deletions
diff --git a/sysdeps/powerpc/dl-machine.c b/sysdeps/powerpc/dl-machine.c
index 4b6205c..7d45e74 100644
--- a/sysdeps/powerpc/dl-machine.c
+++ b/sysdeps/powerpc/dl-machine.c
@@ -45,16 +45,16 @@
#define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
#define OPCODE_ADDI(rd,ra,simm) \
- (0x38000000 | (rd) << 21 | (ra) << 16 | (simm) & 0xffff)
+ (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
#define OPCODE_ADDIS(rd,ra,simm) \
- (0x3c000000 | (rd) << 21 | (ra) << 16 | (simm) & 0xffff)
+ (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
#define OPCODE_ADD(rd,ra,rb) \
(0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
-#define OPCODE_B(target) (0x48000000 | (target) & 0x03fffffc)
-#define OPCODE_BA(target) (0x48000002 | (target) & 0x03fffffc)
+#define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
+#define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
#define OPCODE_BCTR() 0x4e800420
#define OPCODE_LWZ(rd,d,ra) \
- (0x80000000 | (rd) << 21 | (ra) << 16 | (d) & 0xffff)
+ (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
#define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
#define OPCODE_RLWINM(ra,rs,sh,mb,me) \
(0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
@@ -305,7 +305,7 @@ __elf_machine_fixup_plt(struct link_map *map, const Elf32_Rela *reloc,
updating a lazy PLT entry). */
reloc_addr[0] = OPCODE_LI (11, finaladdr);
- reloc_addr[1] = OPCODE_ADDIS (11, 11, finaladdr + 0x8000 >> 16);
+ reloc_addr[1] = OPCODE_ADDIS (11, 11, (finaladdr + 0x8000) >> 16);
reloc_addr[2] = OPCODE_MTCTR (11);
reloc_addr[3] = OPCODE_BCTR ();
}
@@ -355,7 +355,7 @@ __process_machine_rela (struct link_map *map,
_dl_signal_error(0, map->l_name,
"R_PPC_ADDR24 relocation out of range");
}
- *reloc_addr = *reloc_addr & 0xfc000003 | finaladdr & 0x3fffffc;
+ *reloc_addr = (*reloc_addr & 0xfc000003) | (finaladdr & 0x3fffffc);
break;
case R_PPC_ADDR16:
@@ -388,11 +388,11 @@ __process_machine_rela (struct link_map *map,
_dl_signal_error(0, map->l_name,
"R_PPC_ADDR14 relocation out of range");
}
- *reloc_addr = *reloc_addr & 0xffff0003 | finaladdr & 0xfffc;
+ *reloc_addr = (*reloc_addr & 0xffff0003) | (finaladdr & 0xfffc);
if (rinfo != R_PPC_ADDR14)
- *reloc_addr = (*reloc_addr & 0xffdfffff
- | (rinfo == R_PPC_ADDR14_BRTAKEN
- ^ finaladdr >> 31) << 21);
+ *reloc_addr = ((*reloc_addr & 0xffdfffff)
+ | ((rinfo == R_PPC_ADDR14_BRTAKEN)
+ ^ (finaladdr >> 31)) << 21);
break;
case R_PPC_REL24:
@@ -403,7 +403,7 @@ __process_machine_rela (struct link_map *map,
_dl_signal_error(0, map->l_name,
"R_PPC_REL24 relocation out of range");
}
- *reloc_addr = *reloc_addr & 0xfc000003 | delta & 0x3fffffc;
+ *reloc_addr = (*reloc_addr & 0xfc000003) | (delta & 0x3fffffc);
}
break;
diff --git a/sysdeps/powerpc/fclrexcpt.c b/sysdeps/powerpc/fclrexcpt.c
index cfcf175..47254fd 100644
--- a/sysdeps/powerpc/fclrexcpt.c
+++ b/sysdeps/powerpc/fclrexcpt.c
@@ -29,8 +29,8 @@ feclearexcept (int excepts)
u.fenv = fegetenv_register ();
/* Clear the relevant bits. */
- u.l[1] = u.l[1] & ~(-((excepts) >> 31-FPSCR_VX & 1) & FE_ALL_INVALID
- | (excepts) & FPSCR_STICKY_BITS);
+ u.l[1] = u.l[1] & ~((-((excepts) >> (31-FPSCR_VX) & 1) & FE_ALL_INVALID)
+ | ((excepts) & FPSCR_STICKY_BITS));
/* Put the new state in effect. */
fesetenv_register (u.fenv);
diff --git a/sysdeps/powerpc/fesetround.c b/sysdeps/powerpc/fesetround.c
index 0afd6ce..875c897 100644
--- a/sysdeps/powerpc/fesetround.c
+++ b/sysdeps/powerpc/fesetround.c
@@ -32,7 +32,7 @@ fesetround (int round)
u.fenv = fegetenv_register ();
/* Set the relevant bits. */
- u.l[1] = u.l[1] & ~3 | round & 3;
+ u.l[1] = (u.l[1] & ~3) | (round & 3);
/* Put the new state in effect. */
fesetenv_register (u.fenv);
diff --git a/sysdeps/powerpc/feupdateenv.c b/sysdeps/powerpc/feupdateenv.c
index b3a3f95..14fa6bb 100644
--- a/sysdeps/powerpc/feupdateenv.c
+++ b/sysdeps/powerpc/feupdateenv.c
@@ -30,7 +30,7 @@ feupdateenv (const fenv_t *envp)
old.fenv = fegetenv_register ();
/* Copy the set exceptions from `old' to `new'. */
- new.l[1] = new.l[1] & 0xE00000FF | old.l[1] & 0x1FFFFF00;
+ new.l[1] = (new.l[1] & 0xE00000FF) | (old.l[1] & 0x1FFFFF00);
/* Atomically enable and raise (if appropriate) exceptions set in `new'. */
fesetenv_register (new.fenv);
diff --git a/sysdeps/powerpc/fraiseexcpt.c b/sysdeps/powerpc/fraiseexcpt.c
index d0c7971..39e3fbd 100644
--- a/sysdeps/powerpc/fraiseexcpt.c
+++ b/sysdeps/powerpc/fraiseexcpt.c
@@ -35,9 +35,9 @@ feraiseexcept (int excepts)
/* Add the exceptions */
u.l[1] = (u.l[1]
- | excepts & FPSCR_STICKY_BITS
+ | (excepts & FPSCR_STICKY_BITS)
/* Turn FE_INVALID into FE_INVALID_SOFTWARE. */
- | (excepts >> (31 - FPSCR_VX) - (31 - FPSCR_VXSOFT)
+ | (excepts >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT))
& FE_INVALID_SOFTWARE));
/* Store the new status word (along with the rest of the environment),
diff --git a/sysdeps/powerpc/fsetexcptflg.c b/sysdeps/powerpc/fsetexcptflg.c
index b762552..347035e 100644
--- a/sysdeps/powerpc/fsetexcptflg.c
+++ b/sysdeps/powerpc/fsetexcptflg.c
@@ -32,9 +32,9 @@ fesetexceptflag (const fexcept_t *flagp, int excepts)
flag = *flagp & excepts;
/* Replace the exception status */
- u.l[1] = (u.l[1] & ~(FPSCR_STICKY_BITS & excepts)
- | flag & FPSCR_STICKY_BITS
- | (flag >> (31 - FPSCR_VX) - (31 - FPSCR_VXSOFT)
+ u.l[1] = ((u.l[1] & ~(FPSCR_STICKY_BITS & excepts))
+ | (flag & FPSCR_STICKY_BITS)
+ | (flag >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT))
& FE_INVALID_SOFTWARE));
/* Store the new status word (along with the rest of the environment).
diff --git a/sysdeps/powerpc/s_rint.c b/sysdeps/powerpc/s_rint.c
index d6d1dd2..a475875 100644
--- a/sysdeps/powerpc/s_rint.c
+++ b/sysdeps/powerpc/s_rint.c
@@ -25,16 +25,18 @@ __rint (double x)
static const float TWO52 = 4503599627370496.0;
if (fabs (x) < TWO52)
- if (x > 0.0)
- {
- x += TWO52;
- x -= TWO52;
- }
- else if (x < 0.0)
- {
- x -= TWO52;
- x += TWO52;
- }
+ {
+ if (x > 0.0)
+ {
+ x += TWO52;
+ x -= TWO52;
+ }
+ else if (x < 0.0)
+ {
+ x -= TWO52;
+ x += TWO52;
+ }
+ }
return x;
}
diff --git a/sysdeps/powerpc/s_rintf.c b/sysdeps/powerpc/s_rintf.c
index b95c054..dde40bb 100644
--- a/sysdeps/powerpc/s_rintf.c
+++ b/sysdeps/powerpc/s_rintf.c
@@ -25,17 +25,19 @@ __rintf (float x)
static const float TWO23 = 8388608.0;
if (fabsf (x) < TWO23)
- if (x > 0.0)
- {
- x += TWO23;
- x -= TWO23;
- }
- else if (x < 0.0)
- {
- x -= TWO23;
- x += TWO23;
- }
-
+ {
+ if (x > 0.0)
+ {
+ x += TWO23;
+ x -= TWO23;
+ }
+ else if (x < 0.0)
+ {
+ x -= TWO23;
+ x += TWO23;
+ }
+ }
+
return x;
}
weak_alias (__rintf, rintf)
diff --git a/sysdeps/powerpc/w_sqrt.c b/sysdeps/powerpc/w_sqrt.c
index df80973..c42ace5 100644
--- a/sysdeps/powerpc/w_sqrt.c
+++ b/sysdeps/powerpc/w_sqrt.c
@@ -74,9 +74,9 @@ __sqrt(double x)
fe = fegetenv_register();
EXTRACT_WORDS (xi0,xi1,x);
relax_fenv_state();
- sxi = xi0 & 0x3fffffff | 0x3fe00000;
+ sxi = (xi0 & 0x3fffffff) | 0x3fe00000;
INSERT_WORDS (sx, sxi, xi1);
- t_sqrt = __t_sqrt + (xi0 >> 52-32-8-1 & 0x3fe);
+ t_sqrt = __t_sqrt + (xi0 >> (52-32-8-1) & 0x3fe);
sg = t_sqrt[0];
sy = t_sqrt[1];
@@ -84,7 +84,7 @@ __sqrt(double x)
division and a square root and the remainder of the
argument reduction, all interleaved. */
sd = -(sg*sg - sx);
- fsgi = xi0 + 0x40000000 >> 1 & 0x7ff00000;
+ fsgi = (xi0 + 0x40000000) >> 1 & 0x7ff00000;
sy2 = sy + sy;
sg = sy*sd + sg; /* 16-bit approximation to sqrt(sx). */
INSERT_WORDS (fsg, fsgi, 0);
diff --git a/sysdeps/powerpc/w_sqrtf.c b/sysdeps/powerpc/w_sqrtf.c
index 804dff3..d40ade1 100644
--- a/sysdeps/powerpc/w_sqrtf.c
+++ b/sysdeps/powerpc/w_sqrtf.c
@@ -74,9 +74,9 @@ __sqrtf(float x)
GET_FLOAT_WORD (xi, x);
fe = fegetenv_register ();
relax_fenv_state ();
- sxi = xi & 0x3fffffff | 0x3f000000;
+ sxi = (xi & 0x3fffffff) | 0x3f000000;
SET_FLOAT_WORD (sx, sxi);
- t_sqrt = __t_sqrt + (xi >> 23-8-1 & 0x3fe);
+ t_sqrt = __t_sqrt + (xi >> (23-8-1) & 0x3fe);
sg = t_sqrt[0];
sy = t_sqrt[1];
@@ -84,7 +84,7 @@ __sqrtf(float x)
division and a square root and the remainder of the
argument reduction, all interleaved. */
sd = -(sg*sg - sx);
- fsgi = xi + 0x40000000 >> 1 & 0x7f800000;
+ fsgi = (xi + 0x40000000) >> 1 & 0x7f800000;
sy2 = sy + sy;
sg = sy*sd + sg; /* 16-bit approximation to sqrt(sx). */
e = -(sy*sg - almost_half);