diff options
| -rw-r--r-- | ChangeLog | 7 | ||||
| -rw-r--r-- | sysdeps/powerpc/fpu/s_fmax.S | 37 | ||||
| -rw-r--r-- | sysdeps/powerpc/fpu/s_fmin.S | 37 |
3 files changed, 79 insertions, 2 deletions
@@ -1,3 +1,10 @@ +2016-12-15 Joseph Myers <joseph@codesourcery.com> + + [BZ #20947] + * sysdeps/powerpc/fpu/s_fmax.S (__fmax): Add the arguments when + either is a signaling NaN. + * sysdeps/powerpc/fpu/s_fmin.S (__fmin): Likewise. + 2016-12-14 Joseph Myers <joseph@codesourcery.com> [BZ #20947] diff --git a/sysdeps/powerpc/fpu/s_fmax.S b/sysdeps/powerpc/fpu/s_fmax.S index 75ee74c..e6405c0 100644 --- a/sysdeps/powerpc/fpu/s_fmax.S +++ b/sysdeps/powerpc/fpu/s_fmax.S @@ -25,7 +25,42 @@ ENTRY(__fmax) bnulr+ cr0 /* x and y are unordered, so one of x or y must be a NaN... */ fcmpu cr1,fp2,fp2 - bunlr cr1 + bun cr1,1f +/* x is a NaN; y is not. Test if x is signaling. */ +#ifdef __powerpc64__ + stfd fp1,-8(r1) + lwz r3,-8+HIWORD(r1) +#else + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp1,8(r1) + lwz r3,8+HIWORD(r1) + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) +#endif + andis. r3,r3,8 + bne cr0,0f + b 2f +1: /* y is a NaN; x may or may not be. */ + fcmpu cr1,fp1,fp1 + bun cr1,2f +/* y is a NaN; x is not. Test if y is signaling. */ +#ifdef __powerpc64__ + stfd fp2,-8(r1) + lwz r3,-8+HIWORD(r1) +#else + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp2,8(r1) + lwz r3,8+HIWORD(r1) + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) +#endif + andis. r3,r3,8 + bnelr cr0 +2: /* x and y are NaNs, or one is a signaling NaN. */ + fadd fp1,fp1,fp2 + blr 0: fmr fp1,fp2 blr END(__fmax) diff --git a/sysdeps/powerpc/fpu/s_fmin.S b/sysdeps/powerpc/fpu/s_fmin.S index 4d7c3b4..9ae77fe 100644 --- a/sysdeps/powerpc/fpu/s_fmin.S +++ b/sysdeps/powerpc/fpu/s_fmin.S @@ -25,7 +25,42 @@ ENTRY(__fmin) bnulr+ cr0 /* x and y are unordered, so one of x or y must be a NaN... */ fcmpu cr1,fp2,fp2 - bunlr cr1 + bun cr1,1f +/* x is a NaN; y is not. Test if x is signaling. */ +#ifdef __powerpc64__ + stfd fp1,-8(r1) + lwz r3,-8+HIWORD(r1) +#else + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp1,8(r1) + lwz r3,8+HIWORD(r1) + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) +#endif + andis. r3,r3,8 + bne cr0,0f + b 2f +1: /* y is a NaN; x may or may not be. */ + fcmpu cr1,fp1,fp1 + bun cr1,2f +/* y is a NaN; x is not. Test if y is signaling. */ +#ifdef __powerpc64__ + stfd fp2,-8(r1) + lwz r3,-8+HIWORD(r1) +#else + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp2,8(r1) + lwz r3,8+HIWORD(r1) + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) +#endif + andis. r3,r3,8 + bnelr cr0 +2: /* x and y are NaNs, or one is a signaling NaN. */ + fadd fp1,fp1,fp2 + blr 0: fmr fp1,fp2 blr END(__fmin) |