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authorSzabolcs Nagy <szabolcs.nagy@arm.com>2022-10-21 09:52:47 +0100
committerSzabolcs Nagy <szabolcs.nagy@arm.com>2022-10-27 14:46:54 +0100
commit5a4c66e5b37e3ce78d8cfc3b9229d9d73a6bab39 (patch)
tree1ad35fbfcfb6ec432c1f2bce7e1d68536995e91d /sysdeps
parent3dcebd639847f641679ae301554d6ad74578ff4e (diff)
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TODO(uapi): cheri: start: restrict auxv capability permissions
TODO: not needed with full pcuabi
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/aarch64/morello/dl-machine.h2
-rw-r--r--sysdeps/aarch64/morello/start.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/aarch64/morello/dl-machine.h b/sysdeps/aarch64/morello/dl-machine.h
index 0f681b1..7da7c5b 100644
--- a/sysdeps/aarch64/morello/dl-machine.h
+++ b/sysdeps/aarch64/morello/dl-machine.h
@@ -152,6 +152,8 @@ elf_machine_rtld_base_setup (struct link_map *map, void *args)
cap_rw = cap_exe_rw;
ldso_base = cap_rx; /* Assume load segments start at vaddr 0. */
}
+ cap_rx = __builtin_cheri_perms_and (cap_rx, CAP_PERM_MASK_RX);
+ cap_rw = __builtin_cheri_perms_and (cap_rw, CAP_PERM_MASK_RW);
map->l_addr = ldso_base;
map->l_map_start = cap_rx;
map->l_rw_start = cap_rw;
diff --git a/sysdeps/aarch64/morello/start.c b/sysdeps/aarch64/morello/start.c
index de7aeab..5d413ae 100644
--- a/sysdeps/aarch64/morello/start.c
+++ b/sysdeps/aarch64/morello/start.c
@@ -124,9 +124,11 @@ get_caps (uintptr_t *cap_rx, uintptr_t *cap_rw, const uintptr_t *auxv)
return;
case AT_CHERI_EXEC_RX_CAP:
*cap_rx = auxv[1];
+ *cap_rx = __builtin_cheri_perms_and (*cap_rx, CAP_PERM_MASK_RX);
break;
case AT_CHERI_EXEC_RW_CAP:
*cap_rw = auxv[1];
+ *cap_rw = __builtin_cheri_perms_and (*cap_rw, CAP_PERM_MASK_RW);
break;
}
auxv += 2;