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| author | Noah Goldstein <goldstein.w.n@gmail.com> | 2024-08-14 14:37:31 +0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2024-08-15 08:19:15 -0700 |
| commit | f446d90fe6605ac473aaa6cd17a1800e72dcc1a2 (patch) | |
| tree | a381ddf487e56995f35208f093ddacd49256da73 /sysdeps/x86/cpu-tunables.c | |
| parent | b93dddfaf440aa12f45d7c356f6ffe9f27d35577 (diff) | |
| download | glibc-f446d90fe6605ac473aaa6cd17a1800e72dcc1a2.zip glibc-f446d90fe6605ac473aaa6cd17a1800e72dcc1a2.tar.gz glibc-f446d90fe6605ac473aaa6cd17a1800e72dcc1a2.tar.bz2 | |
x86: Add `Avoid_STOSB` tunable to allow NT memset without ERMS
The goal of this flag is to allow targets which don't prefer/have ERMS
to still access the non-temporal memset implementation.
There are 4 cases for tuning memset:
1) `Avoid_STOSB && Avoid_Non_Temporal_Memset`
- Memset with temporal stores
2) `Avoid_STOSB && !Avoid_Non_Temporal_Memset`
- Memset with temporal/non-temporal stores. Non-temporal path
goes through `rep stosb` path. We accomplish this by setting
`x86_rep_stosb_threshold` to
`x86_memset_non_temporal_threshold`.
3) `!Avoid_STOSB && Avoid_Non_Temporal_Memset`
- Memset with temporal stores/`rep stosb`
3) `!Avoid_STOSB && !Avoid_Non_Temporal_Memset`
- Memset with temporal stores/`rep stosb`/non-temporal stores.
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/x86/cpu-tunables.c')
| -rw-r--r-- | sysdeps/x86/cpu-tunables.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index ccc6b64..cd36de2 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -193,6 +193,8 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) 11); CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, Prefer_FSRM, 11); + CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, Avoid_STOSB, + 11); CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH (n, cpu_features, Slow_SSE4_2, SSE4_2, |