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author | Andreas Jaeger <aj@suse.de> | 2000-09-15 12:59:07 +0000 |
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committer | Andreas Jaeger <aj@suse.de> | 2000-09-15 12:59:07 +0000 |
commit | 1ca62d4093eced82f5cb9452183a35540bd5364d (patch) | |
tree | 495a9decb27f0359403bf0fdf2a898c7e3f23528 /sysdeps/mips | |
parent | e091e14537797c342bc75353dab3906bd411dc3f (diff) | |
download | glibc-1ca62d4093eced82f5cb9452183a35540bd5364d.zip glibc-1ca62d4093eced82f5cb9452183a35540bd5364d.tar.gz glibc-1ca62d4093eced82f5cb9452183a35540bd5364d.tar.bz2 |
Update.
* sysdeps/mips/fpu/fenv_libc.h: New file.
* sysdeps/mips/fpu/feenablxcpt.c: Use fenv_libc.h
* sysdeps/mips/fpu/fegetexcept.c: Likewise.
* sysdeps/mips/fpu/fedisblxcpt.c: Likewise.
Diffstat (limited to 'sysdeps/mips')
-rw-r--r-- | sysdeps/mips/fpu/fedisblxcpt.c | 4 | ||||
-rw-r--r-- | sysdeps/mips/fpu/feenablxcpt.c | 4 | ||||
-rw-r--r-- | sysdeps/mips/fpu/fegetexcept.c | 5 | ||||
-rw-r--r-- | sysdeps/mips/fpu/fenv_libc.h | 29 |
4 files changed, 32 insertions, 10 deletions
diff --git a/sysdeps/mips/fpu/fedisblxcpt.c b/sysdeps/mips/fpu/fedisblxcpt.c index 1ca229f..2d2ec8c 100644 --- a/sysdeps/mips/fpu/fedisblxcpt.c +++ b/sysdeps/mips/fpu/fedisblxcpt.c @@ -19,11 +19,9 @@ Boston, MA 02111-1307, USA. */ #include <fenv.h> +#include <fenv_libc.h> #include <fpu_control.h> -#define ENABLE_MASK 0xF80U -#define ENABLE_SHIFT 5 - int fedisableexcept (int excepts) { diff --git a/sysdeps/mips/fpu/feenablxcpt.c b/sysdeps/mips/fpu/feenablxcpt.c index e6175dd..4e63c66 100644 --- a/sysdeps/mips/fpu/feenablxcpt.c +++ b/sysdeps/mips/fpu/feenablxcpt.c @@ -19,11 +19,9 @@ Boston, MA 02111-1307, USA. */ #include <fenv.h> +#include <fenv_libc.h> #include <fpu_control.h> -#define ENABLE_MASK 0xF80U -#define ENABLE_SHIFT 5 - int feenableexcept (int excepts) { diff --git a/sysdeps/mips/fpu/fegetexcept.c b/sysdeps/mips/fpu/fegetexcept.c index 23da9f3..c065398 100644 --- a/sysdeps/mips/fpu/fegetexcept.c +++ b/sysdeps/mips/fpu/fegetexcept.c @@ -19,12 +19,9 @@ Boston, MA 02111-1307, USA. */ #include <fenv.h> +#include <fenv_libc.h> #include <fpu_control.h> -#define ENABLE_MASK 0xF80U -#define ENABLE_SHIFT 5 - - int fegetexcept (void) { diff --git a/sysdeps/mips/fpu/fenv_libc.h b/sysdeps/mips/fpu/fenv_libc.h new file mode 100644 index 0000000..4d8d3eb --- /dev/null +++ b/sysdeps/mips/fpu/fenv_libc.h @@ -0,0 +1,29 @@ +/* Copyright (C) 2000 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Andreas Jaeger <aj@suse.de>. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If not, + write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef _FENV_LIBC_H +#define _FENV_LIBC_H 1 + +/* Mask for enabling exceptions. */ +#define ENABLE_MASK 0xF80U + +/* Shift for FE_* flags. */ +#define ENABLE_SHIFT 5 + +#endif /* _FENV_LIBC_H */ |