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authorWilco <wdijkstr@arm.com>2014-06-24 12:04:27 +0000
committerWilco <wdijkstr@arm.com>2014-06-24 12:04:27 +0000
commit001f7b773c637560ecfa686452a5e68d60d07db3 (patch)
tree08bd670c6b892304a287c56f6cbeb00e92276567 /sysdeps/arm/fsetexcptflg.c
parent4841e6a6c2fa691201fb52dfaf6b6a8920229bac (diff)
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Speed up the ARM fenv implementation by avoiding unnecessary FPSCR
writes if the FPSCR remains unchanged. 2014-06-24 Wilco <wdijkstr@arm.com> * sysdeps/arm/fclrexcpt.c (feclearexcept): Optimize to avoid unnecessary FPSCR writes. * sysdeps/arm/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/arm/feenablxcpt.c (feenableexcept): Likewise. * sysdeps/arm/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/arm/setfpucw.c (__setfpucw): Likewise.
Diffstat (limited to 'sysdeps/arm/fsetexcptflg.c')
-rw-r--r--sysdeps/arm/fsetexcptflg.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/sysdeps/arm/fsetexcptflg.c b/sysdeps/arm/fsetexcptflg.c
index 1a610ff..28810d3 100644
--- a/sysdeps/arm/fsetexcptflg.c
+++ b/sysdeps/arm/fsetexcptflg.c
@@ -25,19 +25,22 @@
int
fesetexceptflag (const fexcept_t *flagp, int excepts)
{
- fpu_control_t fpscr;
+ fpu_control_t fpscr, new_fpscr;
/* Fail if a VFP unit isn't present unless nothing needs to be done. */
if (!ARM_HAVE_VFP)
return (excepts != 0);
_FPU_GETCW (fpscr);
+ excepts &= FE_ALL_EXCEPT;
/* Set the desired exception mask. */
- fpscr &= ~(excepts & FE_ALL_EXCEPT);
- fpscr |= (*flagp & excepts & FE_ALL_EXCEPT);
+ new_fpscr = fpscr & ~excepts;
+ new_fpscr |= *flagp & excepts;
+
+ /* Write new exception flags if changed. */
+ if (new_fpscr != fpscr)
+ _FPU_SETCW (new_fpscr);
- /* Save state back to the FPU. */
- _FPU_SETCW (fpscr);
return 0;
}