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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-05-20 14:41:14 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-06-06 13:22:42 -0700 |
| commit | ed46697862f2b0c2db726cc4c772e6003914bd72 (patch) | |
| tree | da633ebd68b6edf0726174366fda03940d8ee578 /nptl/pthread-pi-defines.sym | |
| parent | 07f943915311f6f92e5a031911d32c5e7458bfd5 (diff) | |
| download | glibc-ed46697862f2b0c2db726cc4c772e6003914bd72.zip glibc-ed46697862f2b0c2db726cc4c772e6003914bd72.tar.gz glibc-ed46697862f2b0c2db726cc4c772e6003914bd72.tar.bz2 | |
Remove special L2 cache case for Knights Landing
L2 cache is shared by 2 cores on Knights Landing, which has 4 threads
per core:
https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing
So L2 cache is shared by 8 threads on Knights Landing as reported by
CPUID. We should remove special L2 cache case for Knights Landing.
[BZ #18185]
* sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads
sharing L2 cache to 2 for Knights Landing.
Diffstat (limited to 'nptl/pthread-pi-defines.sym')
0 files changed, 0 insertions, 0 deletions