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author | Joseph Myers <joseph@codesourcery.com> | 2016-09-07 16:43:03 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2016-09-07 16:43:03 +0000 |
commit | 2c9e80e7d44afd1daec7c7d7760ebbf3bed18cd6 (patch) | |
tree | eb79a0730cf6969f51f28d4bb5e77489c5ed1168 | |
parent | 297c592e2e31cf33f1a99c4efca5e3c2421e8aaf (diff) | |
download | glibc-2c9e80e7d44afd1daec7c7d7760ebbf3bed18cd6.zip glibc-2c9e80e7d44afd1daec7c7d7760ebbf3bed18cd6.tar.gz glibc-2c9e80e7d44afd1daec7c7d7760ebbf3bed18cd6.tar.bz2 |
Add femode_t functions: arm.
This patch adds ARM versions of fegetmode and fesetmode.
* sysdeps/arm/fegetmode.c: New file.
* sysdeps/arm/fesetmode.c: Likewise.
-rw-r--r-- | ChangeLog | 3 | ||||
-rw-r--r-- | sysdeps/arm/fegetmode.c | 29 | ||||
-rw-r--r-- | sysdeps/arm/fesetmode.c | 45 |
3 files changed, 77 insertions, 0 deletions
@@ -1,5 +1,8 @@ 2016-09-07 Joseph Myers <joseph@codesourcery.com> + * sysdeps/arm/fegetmode.c: New file. + * sysdeps/arm/fesetmode.c: Likewise. + * sysdeps/alpha/fpu/fegetmode.c: New file. * sysdeps/alpha/fpu/fesetmode.c: Likewise. diff --git a/sysdeps/arm/fegetmode.c b/sysdeps/arm/fegetmode.c new file mode 100644 index 0000000..1307f53 --- /dev/null +++ b/sysdeps/arm/fegetmode.c @@ -0,0 +1,29 @@ +/* Store current floating-point control modes. ARM version. + Copyright (C) 2016 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <fenv.h> +#include <fpu_control.h> +#include <arm-features.h> + +int +fegetmode (femode_t *modep) +{ + if (ARM_HAVE_VFP) + _FPU_GETCW (*modep); + return 0; +} diff --git a/sysdeps/arm/fesetmode.c b/sysdeps/arm/fesetmode.c new file mode 100644 index 0000000..e96c845 --- /dev/null +++ b/sysdeps/arm/fesetmode.c @@ -0,0 +1,45 @@ +/* Install given floating-point control modes. ARM version. + Copyright (C) 2016 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <fenv.h> +#include <fpu_control.h> +#include <arm-features.h> + +/* NZCV flags, QC bit, IDC bit and bits for IEEE exception status. */ +#define FPU_STATUS_BITS 0xf800009f + +int +fesetmode (const femode_t *modep) +{ + fpu_control_t fpscr, new_fpscr; + + if (!ARM_HAVE_VFP) + /* Nothing to do. */ + return 0; + + _FPU_GETCW (fpscr); + if (modep == FE_DFL_MODE) + new_fpscr = (fpscr & (_FPU_RESERVED | FPU_STATUS_BITS)) | _FPU_DEFAULT; + else + new_fpscr = (fpscr & FPU_STATUS_BITS) | (*modep & ~FPU_STATUS_BITS); + + if (((new_fpscr ^ fpscr) & ~_FPU_MASK_NZCV) != 0) + _FPU_SETCW (new_fpscr); + + return 0; +} |