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| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2021-07-15 08:52:44 -0300 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2021-07-19 14:12:29 -0300 |
| commit | 469761eac842663365bba3dacd4cdf15a2ae328d (patch) | |
| tree | 570826e6942f9bc0bb7eec6bb34dedec141e0d01 | |
| parent | 5adb0e14a5cc9e011e58a7aaf193b598ecbd7b07 (diff) | |
| download | glibc-469761eac842663365bba3dacd4cdf15a2ae328d.zip glibc-469761eac842663365bba3dacd4cdf15a2ae328d.tar.gz glibc-469761eac842663365bba3dacd4cdf15a2ae328d.tar.bz2 | |
elf: Fix tst-cpu-features-cpuinfo on some AMD systems (BZ #28090)
The SSBD feature is implemented in 2 different ways on AMD processors:
newer systems (Zen3) provides AMD_SSBD (function 8000_0008, EBX[24]),
while older system provides AMD_VIRT_SSBD (function 8000_0008, EBX[25]).
However for AMD_VIRT_SSBD, kernel shows both 'ssdb' and 'virt_ssdb' on
/proc/cpuinfo; while for AMD_SSBD only 'ssdb' is provided.
This now check is AMD_SSBD is set to check for 'ssbd', otherwise check
if AMD_VIRT_SSDB is set to check for 'virt_ssbd'.
Checked on x86_64-linux-gnu on a Ryzen 9 5900x.
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
| -rw-r--r-- | manual/platform.texi | 3 | ||||
| -rw-r--r-- | sysdeps/x86/bits/platform/x86.h | 1 | ||||
| -rw-r--r-- | sysdeps/x86/include/cpu-features.h | 3 | ||||
| -rw-r--r-- | sysdeps/x86/tst-cpu-features-cpuinfo.c | 13 |
4 files changed, 19 insertions, 1 deletions
diff --git a/manual/platform.texi b/manual/platform.texi index 037dfc4..c56ba7d 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -190,6 +190,9 @@ The supported processor features are: @code{AMD_STIBP} -- Single thread indirect branch predictors (STIBP) for AMD cpus. @item +@code{AMD_VIRT_SSBD} -- Speculative Store Bypass Disable (SSBD) for AMD cpus (older systems). + +@item @code{AMX_BF16} -- Tile computational operations on bfloat16 numbers. @item diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 5509b1a..2b25760 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -282,6 +282,7 @@ enum x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14, x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15, x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24, + x86_cpu_AMD_VIRT_SSBD = x86_cpu_index_80000008_ebx + 25, x86_cpu_index_7_ecx_1_eax = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int) diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 59e01df..a3f11ba 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -293,6 +293,7 @@ enum #define bit_cpu_AMD_IBRS (1u << 14) #define bit_cpu_AMD_STIBP (1u << 15) #define bit_cpu_AMD_SSBD (1u << 24) +#define bit_cpu_AMD_VIRT_SSBD (1u << 25) /* CPUID_INDEX_7_ECX_1. */ @@ -527,6 +528,7 @@ enum #define index_cpu_AMD_IBRS CPUID_INDEX_80000008 #define index_cpu_AMD_STIBP CPUID_INDEX_80000008 #define index_cpu_AMD_SSBD CPUID_INDEX_80000008 +#define index_cpu_AMD_VIRT_SSBD CPUID_INDEX_80000008 /* CPUID_INDEX_7_ECX_1. */ @@ -761,6 +763,7 @@ enum #define reg_AMD_IBRS ebx #define reg_AMD_STIBP ebx #define reg_AMD_SSBD ebx +#define reg_AMD_VIRT_SSBD ebx /* CPUID_INDEX_7_ECX_1. */ diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c index f457e86..76bf5b2 100644 --- a/sysdeps/x86/tst-cpu-features-cpuinfo.c +++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c @@ -236,7 +236,18 @@ do_test (int argc, char **argv) if (cpu_features->basic.kind == arch_kind_intel) fails += CHECK_PROC (ssbd, SSBD); else if (cpu_features->basic.kind == arch_kind_amd) - fails += CHECK_PROC (ssbd, AMD_SSBD); + { + /* This feature is implemented in 2 different ways on AMD processors: + newer systems provides AMD_SSBD (function 8000_0008, EBX[24]), + while older system proviseds AMD_VIRT_SSBD (function 8000_008, + EBX[25]). However for AMD_VIRT_SSBD, kernel shows both 'ssbd' + and 'virt_ssbd' on /proc/cpuinfo; while for AMD_SSBD only 'ssbd' + is provided. */ + if (HAS_CPU_FEATURE (AMD_SSBD)) + fails += CHECK_PROC (ssbd, AMD_SSBD); + else if (HAS_CPU_FEATURE (AMD_VIRT_SSBD)) + fails += CHECK_PROC (virt_ssbd, AMD_VIRT_SSBD); + } fails += CHECK_PROC (sse, SSE); fails += CHECK_PROC (sse2, SSE2); fails += CHECK_PROC (pni, SSE3); |