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authorSzabolcs Nagy <szabolcs.nagy@arm.com>2022-10-21 15:41:13 +0100
committerSzabolcs Nagy <szabolcs.nagy@arm.com>2022-10-26 15:39:59 +0100
commit3295936b272a1018e31fd634b7e327101eacd711 (patch)
treeda4912ab8205218c9b1660783c1ea23f9915c6c2
parent782fb76092163827a34cff6b66ed654a9e5a070e (diff)
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Revert "TODO(drop): aarch64: morello: CPU feature detection for Morello"
This reverts commit 078ebf3e35bd0c50b58dc2ec796530054f69b9a9.
-rw-r--r--sysdeps/aarch64/multiarch/init-arch.h4
-rw-r--r--sysdeps/unix/sysv/linux/aarch64/cpu-features.c3
-rw-r--r--sysdeps/unix/sysv/linux/aarch64/cpu-features.h6
3 files changed, 1 insertions, 12 deletions
diff --git a/sysdeps/aarch64/multiarch/init-arch.h b/sysdeps/aarch64/multiarch/init-arch.h
index d521918..a4dcac0 100644
--- a/sysdeps/aarch64/multiarch/init-arch.h
+++ b/sysdeps/aarch64/multiarch/init-arch.h
@@ -35,6 +35,4 @@
bool __attribute__((unused)) mte = \
MTE_ENABLED (); \
bool __attribute__((unused)) sve = \
- GLRO(dl_aarch64_cpu_features).sve; \
- bool __attribute__((unused)) morello = \
- GLRO(dl_hwcap2) & HWCAP2_MORELLO;
+ GLRO(dl_aarch64_cpu_features).sve;
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
index 3d95815..d14c0f4 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
@@ -126,7 +126,4 @@ init_cpu_features (struct cpu_features *cpu_features)
/* Check if SVE is supported. */
cpu_features->sve = GLRO (dl_hwcap) & HWCAP_SVE;
-
- /* Check if Morello is supported. */
- cpu_features->morello = GLRO (dl_hwcap2) & HWCAP2_MORELLO;
}
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
index 0742ac1..391165a 100644
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
@@ -68,11 +68,6 @@
#define IS_A64FX(midr) (MIDR_IMPLEMENTOR(midr) == 'F' \
&& MIDR_PARTNUM(midr) == 0x001)
-/* TODO: This is based on the Morello Fast Model.
- Will MIDR_IMPLEMENTOR change to 'A'? */
-#define IS_MORELLO(midr) (MIDR_IMPLEMENTOR(midr) == 0x3f \
- && MIDR_PARTNUM(midr) == 0x412)
-
struct cpu_features
{
uint64_t midr_el1;
@@ -81,7 +76,6 @@ struct cpu_features
/* Currently, the GLIBC memory tagging tunable only defines 8 bits. */
uint8_t mte_state;
bool sve;
- bool morello;
};
#endif /* _CPU_FEATURES_AARCH64_H */