aboutsummaryrefslogtreecommitdiff
path: root/bfd/coff-arm.c
blob: a07fc64febb1a5691af9cfcbcf6822f1268f6326 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
/* BFD back-end for ARM COFF files.
   Copyright (C) 1990-2018 Free Software Foundation, Inc.
   Written by Cygnus Support.

   This file is part of BFD, the Binary File Descriptor library.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "coff/arm.h"
#include "coff/internal.h"

#ifdef COFF_WITH_PE
#include "coff/pe.h"
#endif

#include "libcoff.h"

/* Macros for manipulation the bits in the flags field of the coff data
   structure.  */
#define APCS_26_FLAG(abfd) \
  (coff_data (abfd)->flags & F_APCS_26)

#define APCS_FLOAT_FLAG(abfd) \
  (coff_data (abfd)->flags & F_APCS_FLOAT)

#define PIC_FLAG(abfd) \
  (coff_data (abfd)->flags & F_PIC)

#define APCS_SET(abfd) \
  (coff_data (abfd)->flags & F_APCS_SET)

#define SET_APCS_FLAGS(abfd, flgs) \
  do									\
    {									\
      coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC);	\
      coff_data (abfd)->flags |= (flgs) | F_APCS_SET;			\
    }									\
  while (0)

#define INTERWORK_FLAG(abfd) \
  (coff_data (abfd)->flags & F_INTERWORK)

#define INTERWORK_SET(abfd) \
  (coff_data (abfd)->flags & F_INTERWORK_SET)

#define SET_INTERWORK_FLAG(abfd, flg) \
  do									\
    {									\
      coff_data (abfd)->flags &= ~F_INTERWORK;				\
      coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET;		\
    }									\
  while (0)

#ifndef NUM_ELEM
#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
#endif

typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
/* Some typedefs for holding instructions.  */
typedef unsigned long int insn32;
typedef unsigned short int insn16;

/* The linker script knows the section names for placement.
   The entry_names are used to do simple name mangling on the stubs.
   Given a function name, and its type, the stub can be found. The
   name can be changed. The only requirement is the %s be present.  */

#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
#define THUMB2ARM_GLUE_ENTRY_NAME   "__%s_from_thumb"

#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
#define ARM2THUMB_GLUE_ENTRY_NAME   "__%s_from_arm"

/* Used by the assembler.  */

static bfd_reloc_status_type
coff_arm_reloc (bfd *abfd,
		arelent *reloc_entry,
		asymbol *symbol ATTRIBUTE_UNUSED,
		void * data,
		asection *input_section ATTRIBUTE_UNUSED,
		bfd *output_bfd,
		char **error_message ATTRIBUTE_UNUSED)
{
  symvalue diff;

  if (output_bfd == NULL)
    return bfd_reloc_continue;

  diff = reloc_entry->addend;

#define DOIT(x)							\
  x = ((x & ~howto->dst_mask)					\
       | (((x & howto->src_mask) + diff) & howto->dst_mask))

  if (diff != 0)
    {
      reloc_howto_type *howto = reloc_entry->howto;
      unsigned char *addr = (unsigned char *) data + reloc_entry->address;

      if (! bfd_reloc_offset_in_range (howto, abfd, input_section,
				       reloc_entry->address
				       * bfd_octets_per_byte (abfd)))
	return bfd_reloc_outofrange;

      switch (howto->size)
	{
	case 0:
	  {
	    char x = bfd_get_8 (abfd, addr);
	    DOIT (x);
	    bfd_put_8 (abfd, x, addr);
	  }
	  break;

	case 1:
	  {
	    short x = bfd_get_16 (abfd, addr);
	    DOIT (x);
	    bfd_put_16 (abfd, (bfd_vma) x, addr);
	  }
	  break;

	case 2:
	  {
	    long x = bfd_get_32 (abfd, addr);
	    DOIT (x);
	    bfd_put_32 (abfd, (bfd_vma) x, addr);
	  }
	  break;

	default:
	  abort ();
	}
    }

  /* Now let bfd_perform_relocation finish everything up.  */
  return bfd_reloc_continue;
}

/* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
   in this file), then TARGET_UNDERSCORE should be defined, otherwise it
   should not.  */
#ifndef TARGET_UNDERSCORE
#define TARGET_UNDERSCORE '_'
#endif

#ifndef PCRELOFFSET
#define PCRELOFFSET TRUE
#endif

/* These most certainly belong somewhere else. Just had to get rid of
   the manifest constants in the code.  */

#ifdef ARM_WINCE

#define ARM_26D      0
#define ARM_32       1
#define ARM_RVA32    2
#define ARM_26	     3
#define ARM_THUMB12  4
#define ARM_SECTION  14
#define ARM_SECREL   15

#else

#define ARM_8	     0
#define ARM_16	     1
#define ARM_32	     2
#define ARM_26	     3
#define ARM_DISP8    4
#define ARM_DISP16   5
#define ARM_DISP32   6
#define ARM_26D	     7
/* 8 is unused.  */
#define ARM_NEG16    9
#define ARM_NEG32   10
#define ARM_RVA32   11
#define ARM_THUMB9  12
#define ARM_THUMB12 13
#define ARM_THUMB23 14

#endif

static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type aoutarm_fix_pcrel_26
  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type coff_thumb_pcrel_12
  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
#ifndef ARM_WINCE
static bfd_reloc_status_type coff_thumb_pcrel_9
  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type coff_thumb_pcrel_23
  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
#endif

static reloc_howto_type aoutarm_std_reloc_howto[] =
  {
#ifdef ARM_WINCE
    HOWTO (ARM_26D,
	   2,
	   2,
	   24,
	   TRUE,
	   0,
	   complain_overflow_dont,
	   aoutarm_fix_pcrel_26_done,
	   "ARM_26D",
	   TRUE,	/* partial_inplace.  */
	   0x00ffffff,
	   0x0,
	   PCRELOFFSET),
    HOWTO (ARM_32,
	   0,
	   2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_32",
	   TRUE,	/* partial_inplace.  */
	   0xffffffff,
	   0xffffffff,
	   PCRELOFFSET),
    HOWTO (ARM_RVA32,
	   0,
	   2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_RVA32",
	   TRUE,	/* partial_inplace.  */
	   0xffffffff,
	   0xffffffff,
	   PCRELOFFSET),
    HOWTO (ARM_26,
	   2,
	   2,
	   24,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   aoutarm_fix_pcrel_26 ,
	   "ARM_26",
	   FALSE,
	   0x00ffffff,
	   0x00ffffff,
	   PCRELOFFSET),
    HOWTO (ARM_THUMB12,
	   1,
	   1,
	   11,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_thumb_pcrel_12 ,
	   "ARM_THUMB12",
	   FALSE,
	   0x000007ff,
	   0x000007ff,
	   PCRELOFFSET),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    EMPTY_HOWTO (-1),
    HOWTO (ARM_SECTION,
	   0,
	   1,
	   16,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_SECTION",
	   TRUE,	/* partial_inplace.  */
	   0x0000ffff,
	   0x0000ffff,
	   PCRELOFFSET),
    HOWTO (ARM_SECREL,
	   0,
	   2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_SECREL",
	   TRUE,	/* partial_inplace.  */
	   0xffffffff,
	   0xffffffff,
	   PCRELOFFSET),
#else /* not ARM_WINCE */
    HOWTO (ARM_8,
	   0,
	   0,
	   8,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_8",
	   TRUE,
	   0x000000ff,
	   0x000000ff,
	   PCRELOFFSET),
    HOWTO (ARM_16,
	   0,
	   1,
	   16,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_16",
	   TRUE,
	   0x0000ffff,
	   0x0000ffff,
	   PCRELOFFSET),
    HOWTO (ARM_32,
	   0,
	   2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_32",
	   TRUE,
	   0xffffffff,
	   0xffffffff,
	   PCRELOFFSET),
    HOWTO (ARM_26,
	   2,
	   2,
	   24,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   aoutarm_fix_pcrel_26 ,
	   "ARM_26",
	   FALSE,
	   0x00ffffff,
	   0x00ffffff,
	   PCRELOFFSET),
    HOWTO (ARM_DISP8,
	   0,
	   0,
	   8,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_arm_reloc,
	   "ARM_DISP8",
	   TRUE,
	   0x000000ff,
	   0x000000ff,
	   TRUE),
    HOWTO (ARM_DISP16,
	   0,
	   1,
	   16,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_arm_reloc,
	   "ARM_DISP16",
	   TRUE,
	   0x0000ffff,
	   0x0000ffff,
	   TRUE),
    HOWTO (ARM_DISP32,
	   0,
	   2,
	   32,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_arm_reloc,
	   "ARM_DISP32",
	   TRUE,
	   0xffffffff,
	   0xffffffff,
	   TRUE),
    HOWTO (ARM_26D,
	   2,
	   2,
	   24,
	   FALSE,
	   0,
	   complain_overflow_dont,
	   aoutarm_fix_pcrel_26_done,
	   "ARM_26D",
	   TRUE,
	   0x00ffffff,
	   0x0,
	   FALSE),
    /* 8 is unused */
    EMPTY_HOWTO (-1),
    HOWTO (ARM_NEG16,
	   0,
	   -1,
	   16,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_NEG16",
	   TRUE,
	   0x0000ffff,
	   0x0000ffff,
	   FALSE),
    HOWTO (ARM_NEG32,
	   0,
	   -2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_NEG32",
	   TRUE,
	   0xffffffff,
	   0xffffffff,
	   FALSE),
    HOWTO (ARM_RVA32,
	   0,
	   2,
	   32,
	   FALSE,
	   0,
	   complain_overflow_bitfield,
	   coff_arm_reloc,
	   "ARM_RVA32",
	   TRUE,
	   0xffffffff,
	   0xffffffff,
	   PCRELOFFSET),
    HOWTO (ARM_THUMB9,
	   1,
	   1,
	   8,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_thumb_pcrel_9 ,
	   "ARM_THUMB9",
	   FALSE,
	   0x000000ff,
	   0x000000ff,
	   PCRELOFFSET),
    HOWTO (ARM_THUMB12,
	   1,
	   1,
	   11,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_thumb_pcrel_12 ,
	   "ARM_THUMB12",
	   FALSE,
	   0x000007ff,
	   0x000007ff,
	   PCRELOFFSET),
    HOWTO (ARM_THUMB23,
	   1,
	   2,
	   22,
	   TRUE,
	   0,
	   complain_overflow_signed,
	   coff_thumb_pcrel_23 ,
	   "ARM_THUMB23",
	   FALSE,
	   0x07ff07ff,
	   0x07ff07ff,
	   PCRELOFFSET)
#endif /* not ARM_WINCE */
  };

#define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)

#ifdef COFF_WITH_PE
/* Return TRUE if this relocation should
   appear in the output .reloc section.  */

static bfd_boolean
in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
	    reloc_howto_type * howto)
{
  return !howto->pc_relative && howto->type != ARM_RVA32;
}
#endif

#define RTYPE2HOWTO(cache_ptr, dst)		\
  (cache_ptr)->howto =				\
    (dst)->r_type < NUM_RELOCS			\
    ? aoutarm_std_reloc_howto + (dst)->r_type	\
    : NULL

#define coff_rtype_to_howto coff_arm_rtype_to_howto

static reloc_howto_type *
coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
			 asection *sec,
			 struct internal_reloc *rel,
			 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
			 struct internal_syment *sym ATTRIBUTE_UNUSED,
			 bfd_vma *addendp)
{
  reloc_howto_type * howto;

  if (rel->r_type >= NUM_RELOCS)
    return NULL;

  howto = aoutarm_std_reloc_howto + rel->r_type;

  if (rel->r_type == ARM_RVA32)
    *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;

#if defined COFF_WITH_PE && defined ARM_WINCE
  if (rel->r_type == ARM_SECREL)
    {
      bfd_vma osect_vma;

      if (h && (h->type == bfd_link_hash_defined
		|| h->type == bfd_link_hash_defweak))
	osect_vma = h->root.u.def.section->output_section->vma;
      else
	{
	  int i;

	  /* Sigh, the only way to get the section to offset against
	     is to find it the hard way.  */

	  for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
	    sec = sec->next;

	  osect_vma = sec->output_section->vma;
	}

      *addendp -= osect_vma;
    }
#endif

  return howto;
}

/* Used by the assembler.  */

static bfd_reloc_status_type
aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
			   arelent *reloc_entry ATTRIBUTE_UNUSED,
			   asymbol *symbol ATTRIBUTE_UNUSED,
			   void * data ATTRIBUTE_UNUSED,
			   asection *input_section ATTRIBUTE_UNUSED,
			   bfd *output_bfd ATTRIBUTE_UNUSED,
			   char **error_message ATTRIBUTE_UNUSED)
{
  /* This is dead simple at present.  */
  return bfd_reloc_ok;
}

/* Used by the assembler.  */

static bfd_reloc_status_type
aoutarm_fix_pcrel_26 (bfd *abfd,
		      arelent *reloc_entry,
		      asymbol *symbol,
		      void * data,
		      asection *input_section,
		      bfd *output_bfd,
		      char **error_message ATTRIBUTE_UNUSED)
{
  bfd_vma relocation;
  bfd_size_type addr = reloc_entry->address;
  long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
  bfd_reloc_status_type flag = bfd_reloc_ok;

  /* If this is an undefined symbol, return error.  */
  if (bfd_is_und_section (symbol->section)
      && (symbol->flags & BSF_WEAK) == 0)
    return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;

  /* If the sections are different, and we are doing a partial relocation,
     just ignore it for now.  */
  if (symbol->section->name != input_section->name
      && output_bfd != (bfd *)NULL)
    return bfd_reloc_continue;

  relocation = (target & 0x00ffffff) << 2;
  relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend.  */
  relocation += symbol->value;
  relocation += symbol->section->output_section->vma;
  relocation += symbol->section->output_offset;
  relocation += reloc_entry->addend;
  relocation -= input_section->output_section->vma;
  relocation -= input_section->output_offset;
  relocation -= addr;

  if (relocation & 3)
    return bfd_reloc_overflow;

  /* Check for overflow.  */
  if (relocation & 0x02000000)
    {
      if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
	flag = bfd_reloc_overflow;
    }
  else if (relocation & ~(bfd_vma) 0x03ffffff)
    flag = bfd_reloc_overflow;

  target &= ~0x00ffffff;
  target |= (relocation >> 2) & 0x00ffffff;
  bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);

  /* Now the ARM magic... Change the reloc type so that it is marked as done.
     Strictly this is only necessary if we are doing a partial relocation.  */
  reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];

  return flag;
}

static bfd_reloc_status_type
coff_thumb_pcrel_common (bfd *abfd,
			 arelent *reloc_entry,
			 asymbol *symbol,
			 void * data,
			 asection *input_section,
			 bfd *output_bfd,
			 char **error_message ATTRIBUTE_UNUSED,
			 thumb_pcrel_branchtype btype)
{
  bfd_vma relocation = 0;
  bfd_size_type addr = reloc_entry->address;
  long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
  bfd_reloc_status_type flag = bfd_reloc_ok;
  bfd_vma dstmsk;
  bfd_vma offmsk;
  bfd_vma signbit;

  /* NOTE: This routine is currently used by GAS, but not by the link
     phase.  */
  switch (btype)
    {
    case b9:
      dstmsk  = 0x000000ff;
      offmsk  = 0x000001fe;
      signbit = 0x00000100;
      break;

    case b12:
      dstmsk  = 0x000007ff;
      offmsk  = 0x00000ffe;
      signbit = 0x00000800;
      break;

    case b23:
      dstmsk  = 0x07ff07ff;
      offmsk  = 0x007fffff;
      signbit = 0x00400000;
      break;

    default:
      abort ();
    }

  /* If this is an undefined symbol, return error.  */
  if (bfd_is_und_section (symbol->section)
      && (symbol->flags & BSF_WEAK) == 0)
    return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;

  /* If the sections are different, and we are doing a partial relocation,
     just ignore it for now.  */
  if (symbol->section->name != input_section->name
      && output_bfd != (bfd *)NULL)
    return bfd_reloc_continue;

  switch (btype)
    {
    case b9:
    case b12:
      relocation = ((target & dstmsk) << 1);
      break;

    case b23:
      if (bfd_big_endian (abfd))
	relocation = ((target & 0x7ff) << 1)  | ((target & 0x07ff0000) >> 4);
      else
	relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
      break;

    default:
      abort ();
    }

  relocation = (relocation ^ signbit) - signbit; /* Sign extend.  */
  relocation += symbol->value;
  relocation += symbol->section->output_section->vma;
  relocation += symbol->section->output_offset;
  relocation += reloc_entry->addend;
  relocation -= input_section->output_section->vma;
  relocation -= input_section->output_offset;
  relocation -= addr;

  if (relocation & 1)
    return bfd_reloc_overflow;

  /* Check for overflow.  */
  if (relocation & signbit)
    {
      if ((relocation & ~offmsk) != ~offmsk)
	flag = bfd_reloc_overflow;
    }
  else if (relocation & ~offmsk)
    flag = bfd_reloc_overflow;

  target &= ~dstmsk;
  switch (btype)
   {
   case b9:
   case b12:
     target |= (relocation >> 1);
     break;

   case b23:
     if (bfd_big_endian (abfd))
       target |= (((relocation & 0xfff) >> 1)
		  | ((relocation << 4)  & 0x07ff0000));
     else
       target |= (((relocation & 0xffe) << 15)
		  | ((relocation >> 12) & 0x7ff));
     break;

   default:
     abort ();
   }

  bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);

  /* Now the ARM magic... Change the reloc type so that it is marked as done.
     Strictly this is only necessary if we are doing a partial relocation.  */
  reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];

  /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations.  */
  return flag;
}

#ifndef ARM_WINCE
static bfd_reloc_status_type
coff_thumb_pcrel_23 (bfd *abfd,
		     arelent *reloc_entry,
		     asymbol *symbol,
		     void * data,
		     asection *input_section,
		     bfd *output_bfd,
		     char **error_message)
{
  return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
				  input_section, output_bfd, error_message,
				  b23);
}

static bfd_reloc_status_type
coff_thumb_pcrel_9 (bfd *abfd,
		    arelent *reloc_entry,
		    asymbol *symbol,
		    void * data,
		    asection *input_section,
		    bfd *output_bfd,
		    char **error_message)
{
  return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
				  input_section, output_bfd, error_message,
				  b9);
}
#endif /* not ARM_WINCE */

static bfd_reloc_status_type
coff_thumb_pcrel_12 (bfd *abfd,
		     arelent *reloc_entry,
		     asymbol *symbol,
		     void * data,
		     asection *input_section,
		     bfd *output_bfd,
		     char **error_message)
{
  return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
				  input_section, output_bfd, error_message,
				  b12);
}

static reloc_howto_type *
coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
{
#define ASTD(i,j)       case i: return aoutarm_std_reloc_howto + j

  if (code == BFD_RELOC_CTOR)
    switch (bfd_arch_bits_per_address (abfd))
      {
      case 32:
	code = BFD_RELOC_32;
	break;
      default:
	return NULL;
      }

  switch (code)
    {
#ifdef ARM_WINCE
      ASTD (BFD_RELOC_32,		    ARM_32);
      ASTD (BFD_RELOC_RVA,		    ARM_RVA32);
      ASTD (BFD_RELOC_ARM_PCREL_BRANCH,	    ARM_26);
      ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
      ASTD (BFD_RELOC_32_SECREL,	    ARM_SECREL);
#else
      ASTD (BFD_RELOC_8,		    ARM_8);
      ASTD (BFD_RELOC_16,		    ARM_16);
      ASTD (BFD_RELOC_32,		    ARM_32);
      ASTD (BFD_RELOC_ARM_PCREL_BRANCH,	    ARM_26);
      ASTD (BFD_RELOC_ARM_PCREL_BLX,	    ARM_26);
      ASTD (BFD_RELOC_8_PCREL,		    ARM_DISP8);
      ASTD (BFD_RELOC_16_PCREL,		    ARM_DISP16);
      ASTD (BFD_RELOC_32_PCREL,		    ARM_DISP32);
      ASTD (BFD_RELOC_RVA,		    ARM_RVA32);
      ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9,  ARM_THUMB9);
      ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
      ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
      ASTD (BFD_RELOC_THUMB_PCREL_BLX,	    ARM_THUMB23);
#endif
    default: return NULL;
    }
}

static reloc_howto_type *
coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
			    const char *r_name)
{
  unsigned int i;

  for (i = 0;
       i < (sizeof (aoutarm_std_reloc_howto)
	    / sizeof (aoutarm_std_reloc_howto[0]));
       i++)
    if (aoutarm_std_reloc_howto[i].name != NULL
	&& strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
      return &aoutarm_std_reloc_howto[i];

  return NULL;
}

#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER  2
#define COFF_PAGE_SIZE			      0x1000

/* Turn a howto into a reloc  nunmber.  */
#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
#define BADMAG(x)	      ARMBADMAG(x)
#define ARM		      1			/* Customize coffcode.h.  */

#ifndef ARM_WINCE
/* Make sure that the 'r_offset' field is copied properly
   so that identical binaries will compare the same.  */
#define SWAP_IN_RELOC_OFFSET	H_GET_32
#define SWAP_OUT_RELOC_OFFSET	H_PUT_32
#endif

/* Extend the coff_link_hash_table structure with a few ARM specific fields.
   This allows us to store global data here without actually creating any
   global variables, which is a no-no in the BFD world.  */
struct coff_arm_link_hash_table
  {
    /* The original coff_link_hash_table structure.  MUST be first field.  */
    struct coff_link_hash_table	root;

    /* The size in bytes of the section containing the Thumb-to-ARM glue.  */
    bfd_size_type		thumb_glue_size;

    /* The size in bytes of the section containing the ARM-to-Thumb glue.  */
    bfd_size_type		arm_glue_size;

    /* An arbitrary input BFD chosen to hold the glue sections.  */
    bfd *			bfd_of_glue_owner;

    /* Support interworking with old, non-interworking aware ARM code.  */
    int				support_old_code;
};

/* Get the ARM coff linker hash table from a link_info structure.  */
#define coff_arm_hash_table(info) \
  ((struct coff_arm_link_hash_table *) ((info)->hash))

/* Create an ARM coff linker hash table.  */

static struct bfd_link_hash_table *
coff_arm_link_hash_table_create (bfd * abfd)
{
  struct coff_arm_link_hash_table * ret;
  bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);

  ret = bfd_zmalloc (amt);
  if (ret == NULL)
    return NULL;

  if (!_bfd_coff_link_hash_table_init (&ret->root,
				       abfd,
				       _bfd_coff_link_hash_newfunc,
				       sizeof (struct coff_link_hash_entry)))
    {
      free (ret);
      return NULL;
    }

  return & ret->root.root;
}

static bfd_boolean
arm_emit_base_file_entry (struct bfd_link_info *info,
			  bfd *output_bfd,
			  asection *input_section,
			  bfd_vma reloc_offset)
{
  bfd_vma addr = (reloc_offset
		  - input_section->vma
		  + input_section->output_offset
		  + input_section->output_section->vma);

  if (coff_data (output_bfd)->pe)
     addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
  if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1)
    return TRUE;

  bfd_set_error (bfd_error_system_call);
  return FALSE;
}

#ifndef ARM_WINCE
/* The thumb form of a long branch is a bit finicky, because the offset
   encoding is split over two fields, each in it's own instruction. They
   can occur in any order. So given a thumb form of long branch, and an
   offset, insert the offset into the thumb branch and return finished
   instruction.

   It takes two thumb instructions to encode the target address. Each has
   11 bits to invest. The upper 11 bits are stored in one (identified by
   H-0.. see below), the lower 11 bits are stored in the other (identified
   by H-1).

   Combine together and shifted left by 1 (it's a half word address) and
   there you have it.

     Op: 1111 = F,
     H-0, upper address-0 = 000
     Op: 1111 = F,
     H-1, lower address-0 = 800

   They can be ordered either way, but the arm tools I've seen always put
   the lower one first. It probably doesn't matter. krk@cygnus.com

   XXX:  Actually the order does matter.  The second instruction (H-1)
   moves the computed address into the PC, so it must be the second one
   in the sequence.  The problem, however is that whilst little endian code
   stores the instructions in HI then LOW order, big endian code does the
   reverse.  nickc@cygnus.com.  */

#define LOW_HI_ORDER 0xF800F000
#define HI_LOW_ORDER 0xF000F800

static insn32
insert_thumb_branch (insn32 br_insn, int rel_off)
{
  unsigned int low_bits;
  unsigned int high_bits;

  BFD_ASSERT ((rel_off & 1) != 1);

  rel_off >>= 1;			      /* Half word aligned address.  */
  low_bits = rel_off & 0x000007FF;	      /* The bottom 11 bits.  */
  high_bits = (rel_off >> 11) & 0x000007FF;   /* The top 11 bits.  */

  if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
    br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
  else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
    br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
  else
    /* FIXME: the BFD library should never abort except for internal errors
       - it should return an error status.  */
    abort (); /* Error - not a valid branch instruction form.  */

  return br_insn;
}


static struct coff_link_hash_entry *
find_thumb_glue (struct bfd_link_info *info,
		 const char *name,
		 bfd *input_bfd)
{
  char *tmp_name;
  struct coff_link_hash_entry *myh;
  bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;

  tmp_name = bfd_malloc (amt);

  BFD_ASSERT (tmp_name);

  sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);

  myh = coff_link_hash_lookup
    (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);

  if (myh == NULL)
    /* xgettext:c-format */
    _bfd_error_handler (_("%pB: unable to find THUMB glue '%s' for `%s'"),
			input_bfd, tmp_name, name);

  free (tmp_name);

  return myh;
}
#endif /* not ARM_WINCE */

static struct coff_link_hash_entry *
find_arm_glue (struct bfd_link_info *info,
	       const char *name,
	       bfd *input_bfd)
{
  char *tmp_name;
  struct coff_link_hash_entry * myh;
  bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;

  tmp_name = bfd_malloc (amt);

  BFD_ASSERT (tmp_name);

  sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);

  myh = coff_link_hash_lookup
    (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);

  if (myh == NULL)
    /* xgettext:c-format */
    _bfd_error_handler (_("%pB: unable to find ARM glue '%s' for `%s'"),
			input_bfd, tmp_name, name);

  free (tmp_name);

  return myh;
}

/*
  ARM->Thumb glue:

       .arm
       __func_from_arm:
	     ldr r12, __func_addr
	     bx  r12
       __func_addr:
	    .word func    @ behave as if you saw a ARM_32 reloc
*/

#define ARM2THUMB_GLUE_SIZE 12
static const insn32 a2t1_ldr_insn       = 0xe59fc000;
static const insn32 a2t2_bx_r12_insn    = 0xe12fff1c;
static const insn32 a2t3_func_addr_insn = 0x00000001;

/*
   Thumb->ARM:				Thumb->(non-interworking aware) ARM

   .thumb				.thumb
   .align 2				.align 2
      __func_from_thumb:		   __func_from_thumb:
	   bx pc				push {r6, lr}
	   nop					ldr  r6, __func_addr
   .arm						mov  lr, pc
      __func_change_to_arm:			bx   r6
	   b func			.arm
					   __func_back_to_thumb:
						ldmia r13! {r6, lr}
						bx    lr
					   __func_addr:
						.word	func
*/

#define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
#ifndef ARM_WINCE
static const insn16 t2a1_bx_pc_insn = 0x4778;
static const insn16 t2a2_noop_insn  = 0x46c0;
static const insn32 t2a3_b_insn     = 0xea000000;

static const insn16 t2a1_push_insn  = 0xb540;
static const insn16 t2a2_ldr_insn   = 0x4e03;
static const insn16 t2a3_mov_insn   = 0x46fe;
static const insn16 t2a4_bx_insn    = 0x4730;
static const insn32 t2a5_pop_insn   = 0xe8bd4040;
static const insn32 t2a6_bx_insn    = 0xe12fff1e;
#endif

/* TODO:
     We should really create new local (static) symbols in destination
     object for each stub we create.  We should also create local
     (static) symbols within the stubs when switching between ARM and
     Thumb code.  This will ensure that the debugger and disassembler
     can present a better view of stubs.

     We can treat stubs like literal sections, and for the THUMB9 ones
     (short addressing range) we should be able to insert the stubs
     between sections. i.e. the simplest approach (since relocations
     are done on a section basis) is to dump the stubs at the end of
     processing a section. That way we can always try and minimise the
     offset to and from a stub. However, this does not map well onto
     the way that the linker/BFD does its work: mapping all input
     sections to output sections via the linker script before doing
     all the processing.

     Unfortunately it may be easier to just to disallow short range
     Thumb->ARM stubs (i.e. no conditional inter-working branches,
     only branch-and-link (BL) calls.  This will simplify the processing
     since we can then put all of the stubs into their own section.

  TODO:
     On a different subject, rather than complaining when a
     branch cannot fit in the number of bits available for the
     instruction we should generate a trampoline stub (needed to
     address the complete 32bit address space).  */

/* The standard COFF backend linker does not cope with the special
   Thumb BRANCH23 relocation.  The alternative would be to split the
   BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
   bit simpler simply providing our own relocation driver.  */

/* The reloc processing routine for the ARM/Thumb COFF linker.  NOTE:
   This code is a very slightly modified copy of
   _bfd_coff_generic_relocate_section.  It would be a much more
   maintainable solution to have a MACRO that could be expanded within
   _bfd_coff_generic_relocate_section that would only be provided for
   ARM/Thumb builds.  It is only the code marked THUMBEXTENSION that
   is different from the original.  */

static bfd_boolean
coff_arm_relocate_section (bfd *output_bfd,
			   struct bfd_link_info *info,
			   bfd *input_bfd,
			   asection *input_section,
			   bfd_byte *contents,
			   struct internal_reloc *relocs,
			   struct internal_syment *syms,
			   asection **sections)
{
  struct internal_reloc * rel;
  struct internal_reloc * relend;
#ifndef ARM_WINCE
  bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
#endif

  rel = relocs;
  relend = rel + input_section->reloc_count;

  for (; rel < relend; rel++)
    {
      int			     done = 0;
      long			     symndx;
      struct coff_link_hash_entry *  h;
      struct internal_syment *	     sym;
      bfd_vma			     addend;
      bfd_vma			     val;
      reloc_howto_type *	     howto;
      bfd_reloc_status_type	     rstat;
      bfd_vma			     h_val;

      symndx = rel->r_symndx;

      if (symndx == -1)
	{
	  h = NULL;
	  sym = NULL;
	}
      else
	{
	  h = obj_coff_sym_hashes (input_bfd)[symndx];
	  sym = syms + symndx;
	}

      /* COFF treats common symbols in one of two ways.  Either the
	 size of the symbol is included in the section contents, or it
	 is not.  We assume that the size is not included, and force
	 the rtype_to_howto function to adjust the addend as needed.  */

      if (sym != NULL && sym->n_scnum != 0)
	addend = - sym->n_value;
      else
	addend = 0;

      howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
				       sym, &addend);
      if (howto == NULL)
	return FALSE;

      /* The relocation_section function will skip pcrel_offset relocs
	 when doing a relocatable link.  However, we want to convert
	 ARM_26 to ARM_26D relocs if possible.  We return a fake howto in
	 this case without pcrel_offset set, and adjust the addend to
	 compensate.  'partial_inplace' is also set, since we want 'done'
	 relocations to be reflected in section's data.  */
      if (rel->r_type == ARM_26
	  && h != NULL
	  && bfd_link_relocatable (info)
	  && (h->root.type == bfd_link_hash_defined
	      || h->root.type == bfd_link_hash_defweak)
	  && (h->root.u.def.section->output_section
	      == input_section->output_section))
	{
	  static reloc_howto_type fake_arm26_reloc =
	    HOWTO (ARM_26,
	       2,
	       2,
	       24,
	       TRUE,
	       0,
	       complain_overflow_signed,
	       aoutarm_fix_pcrel_26 ,
	       "ARM_26",
	       TRUE,
	       0x00ffffff,
	       0x00ffffff,
	       FALSE);

	  addend -= rel->r_vaddr - input_section->vma;
#ifdef ARM_WINCE
	  /* FIXME: I don't know why, but the hack is necessary for correct
		    generation of bl's instruction offset.  */
	  addend -= 8;
#endif
	  howto = & fake_arm26_reloc;
	}

#ifdef ARM_WINCE
      /* MS ARM-CE makes the reloc relative to the opcode's pc, not
	 the next opcode's pc, so is off by one.  */
      if (howto->pc_relative && !bfd_link_relocatable (info))
	addend -= 8;
#endif

      /* If we are doing a relocatable link, then we can just ignore
	 a PC relative reloc that is pcrel_offset.  It will already
	 have the correct value.  If this is not a relocatable link,
	 then we should ignore the symbol value.  */
      if (howto->pc_relative && howto->pcrel_offset)
	{
	  if (bfd_link_relocatable (info))
	    continue;
	  /* FIXME - it is not clear which targets need this next test
	     and which do not.  It is known that it is needed for the
	     VxWorks targets but it is also known that it was suppressed
	     for other ARM targets.  This ought to be sorted out one day.  */
#ifdef ARM_COFF_BUGFIX
	  /* We must not ignore the symbol value.  If the symbol is
	     within the same section, the relocation should have already
	     been fixed, but if it is not, we'll be handed a reloc into
	     the beginning of the symbol's section, so we must not cancel
	     out the symbol's value, otherwise we'll be adding it in
	     twice.  */
	  if (sym != NULL && sym->n_scnum != 0)
	    addend += sym->n_value;
#endif
	}

      val = 0;

      if (h == NULL)
	{
	  asection *sec;

	  if (symndx == -1)
	    {
	      sec = bfd_abs_section_ptr;
	      val = 0;
	    }
	  else
	    {
	      sec = sections[symndx];
	      val = (sec->output_section->vma
		     + sec->output_offset
		     + sym->n_value
		     - sec->vma);
	    }
	}
      else
	{
	  /* We don't output the stubs if we are generating a
	     relocatable output file, since we may as well leave the
	     stub generation to the final linker pass. If we fail to
	     verify that the name is defined, we'll try to build stubs
	     for an undefined name...  */
	  if (! bfd_link_relocatable (info)
	      && (   h->root.type == bfd_link_hash_defined
		  || h->root.type == bfd_link_hash_defweak))
	    {
	      asection *   h_sec = h->root.u.def.section;
	      const char * name  = h->root.root.string;

	      /* h locates the symbol referenced in the reloc.  */
	      h_val = (h->root.u.def.value
		       + h_sec->output_section->vma
		       + h_sec->output_offset);

	      if (howto->type == ARM_26)
		{
		  if (   h->symbol_class == C_THUMBSTATFUNC
		      || h->symbol_class == C_THUMBEXTFUNC)
		    {
		      /* Arm code calling a Thumb function.  */
		      unsigned long int			tmp;
		      bfd_vma				my_offset;
		      asection *			s;
		      long int				ret_offset;
		      struct coff_link_hash_entry *	myh;
		      struct coff_arm_link_hash_table * globals;

		      myh = find_arm_glue (info, name, input_bfd);
		      if (myh == NULL)
			return FALSE;

		      globals = coff_arm_hash_table (info);

		      BFD_ASSERT (globals != NULL);
		      BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

		      my_offset = myh->root.u.def.value;

		      s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
						  ARM2THUMB_GLUE_SECTION_NAME);
		      BFD_ASSERT (s != NULL);
		      BFD_ASSERT (s->contents != NULL);
		      BFD_ASSERT (s->output_section != NULL);

		      if ((my_offset & 0x01) == 0x01)
			{
			  if (h_sec->owner != NULL
			      && INTERWORK_SET (h_sec->owner)
			      && ! INTERWORK_FLAG (h_sec->owner))
			    _bfd_error_handler
			      /* xgettext:c-format */
			      (_("%pB(%s): warning: interworking not enabled; "
				 "first occurrence: %pB: arm call to thumb"),
			       h_sec->owner, name, input_bfd);

			  --my_offset;
			  myh->root.u.def.value = my_offset;

			  bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
				      s->contents + my_offset);

			  bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
				      s->contents + my_offset + 4);

			  /* It's a thumb address.  Add the low order bit.  */
			  bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
				      s->contents + my_offset + 8);

			  if (info->base_file
			      && !arm_emit_base_file_entry (info, output_bfd,
							    s, my_offset + 8))
			    return FALSE;
			}

		      BFD_ASSERT (my_offset <= globals->arm_glue_size);

		      tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
					- input_section->vma);

		      tmp = tmp & 0xFF000000;

		      /* Somehow these are both 4 too far, so subtract 8.  */
		      ret_offset =
			s->output_offset
			+ my_offset
			+ s->output_section->vma
			- (input_section->output_offset
			   + input_section->output_section->vma
			   + rel->r_vaddr)
			- 8;

		      tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);

		      bfd_put_32 (output_bfd, (bfd_vma) tmp,
				  contents + rel->r_vaddr - input_section->vma);
		      done = 1;
		    }
		}

#ifndef ARM_WINCE
	      /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12.  */
	      else if (howto->type == ARM_THUMB23)
		{
		  if (   h->symbol_class == C_EXT
		      || h->symbol_class == C_STAT
		      || h->symbol_class == C_LABEL)
		    {
		      /* Thumb code calling an ARM function.  */
		      asection *			 s = 0;
		      bfd_vma				 my_offset;
		      unsigned long int			 tmp;
		      long int				 ret_offset;
		      struct coff_link_hash_entry *	 myh;
		      struct coff_arm_link_hash_table *	 globals;

		      myh = find_thumb_glue (info, name, input_bfd);
		      if (myh == NULL)
			return FALSE;

		      globals = coff_arm_hash_table (info);

		      BFD_ASSERT (globals != NULL);
		      BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

		      my_offset = myh->root.u.def.value;

		      s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
						   THUMB2ARM_GLUE_SECTION_NAME);

		      BFD_ASSERT (s != NULL);
		      BFD_ASSERT (s->contents != NULL);
		      BFD_ASSERT (s->output_section != NULL);

		      if ((my_offset & 0x01) == 0x01)
			{
			  if (h_sec->owner != NULL
			      && INTERWORK_SET (h_sec->owner)
			      && ! INTERWORK_FLAG (h_sec->owner)
			      && ! globals->support_old_code)
			    _bfd_error_handler
			      /* xgettext:c-format */
			      (_("%pB(%s): warning: interworking not enabled; "
				 "first occurrence: %pB: thumb call to arm; "
				 "consider relinking with --support-old-code "
				 "enabled"),
			       h_sec->owner, name, input_bfd);

			  -- my_offset;
			  myh->root.u.def.value = my_offset;

			  if (globals->support_old_code)
			    {
			      bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
					  s->contents + my_offset);

			      bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
					  s->contents + my_offset + 2);

			      bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
					  s->contents + my_offset + 4);

			      bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
					  s->contents + my_offset + 6);

			      bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
					  s->contents + my_offset + 8);

			      bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
					  s->contents + my_offset + 12);

			      /* Store the address of the function in the last word of the stub.  */
			      bfd_put_32 (output_bfd, h_val,
					  s->contents + my_offset + 16);

			      if (info->base_file
				  && !arm_emit_base_file_entry (info,
								output_bfd, s,
								my_offset + 16))
				return FALSE;
			    }
			  else
			    {
			      bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
					  s->contents + my_offset);

			      bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
					  s->contents + my_offset + 2);

			      ret_offset =
		/* Address of destination of the stub.  */
				((bfd_signed_vma) h_val)
				- ((bfd_signed_vma)
		/* Offset from the start of the current section to the start of the stubs.  */
				   (s->output_offset
		/* Offset of the start of this stub from the start of the stubs.  */
				    + my_offset
		/* Address of the start of the current section.  */
				    + s->output_section->vma)
		/* The branch instruction is 4 bytes into the stub.  */
				   + 4
		/* ARM branches work from the pc of the instruction + 8.  */
				   + 8);

			      bfd_put_32 (output_bfd,
					  (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
					  s->contents + my_offset + 4);

			    }
			}

		      BFD_ASSERT (my_offset <= globals->thumb_glue_size);

		      /* Now go back and fix up the original BL insn to point
			 to here.  */
		      ret_offset =
			s->output_offset
			+ my_offset
			- (input_section->output_offset
			   + rel->r_vaddr)
			-4;

		      tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
					- input_section->vma);

		      bfd_put_32 (output_bfd,
				  (bfd_vma) insert_thumb_branch (tmp,
								 ret_offset),
				  contents + rel->r_vaddr - input_section->vma);

		      done = 1;
		    }
		}
#endif
	    }

	  /* If the relocation type and destination symbol does not
	     fall into one of the above categories, then we can just
	     perform a direct link.  */

	  if (done)
	    rstat = bfd_reloc_ok;
	  else
	    if (   h->root.type == bfd_link_hash_defined
		|| h->root.type == bfd_link_hash_defweak)
	    {
	      asection *sec;

	      sec = h->root.u.def.section;
	      val = (h->root.u.def.value
		     + sec->output_section->vma
		     + sec->output_offset);
	      }

	  else if (! bfd_link_relocatable (info))
	    (*info->callbacks->undefined_symbol)
	      (info, h->root.root.string, input_bfd, input_section,
	       rel->r_vaddr - input_section->vma, TRUE);
	}

      /* Emit a reloc if the backend thinks it needs it.  */
      if (info->base_file
	  && sym
	  && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)
	  && !arm_emit_base_file_entry (info, output_bfd, input_section,
					rel->r_vaddr))
	return FALSE;

      if (done)
	rstat = bfd_reloc_ok;
#ifndef ARM_WINCE
      /* Only perform this fix during the final link, not a relocatable link.  */
      else if (! bfd_link_relocatable (info)
	       && howto->type == ARM_THUMB23)
	{
	  /* This is pretty much a copy of what the default
	     _bfd_final_link_relocate and _bfd_relocate_contents
	     routines do to perform a relocation, with special
	     processing for the split addressing of the Thumb BL
	     instruction.  Again, it would probably be simpler adding a
	     ThumbBRANCH23 specific macro expansion into the default
	     code.  */

	  bfd_vma address = rel->r_vaddr - input_section->vma;

	  if (address > high_address)
	    rstat = bfd_reloc_outofrange;
	  else
	    {
	      bfd_vma relocation = val + addend;
	      int size = bfd_get_reloc_size (howto);
	      bfd_boolean overflow = FALSE;
	      bfd_byte *location = contents + address;
	      bfd_vma x = bfd_get_32 (input_bfd, location);
	      bfd_vma src_mask = 0x007FFFFE;
	      bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
	      bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
	      bfd_vma check;
	      bfd_signed_vma signed_check;
	      bfd_vma add;
	      bfd_signed_vma signed_add;

	      BFD_ASSERT (size == 4);

	      /* howto->pc_relative should be TRUE for type 14 BRANCH23.  */
	      relocation -= (input_section->output_section->vma
			     + input_section->output_offset);

	      /* howto->pcrel_offset should be TRUE for type 14 BRANCH23.  */
	      relocation -= address;

	      /* No need to negate the relocation with BRANCH23.  */
	      /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23.  */
	      /* howto->rightshift == 1 */

	      /* Drop unwanted bits from the value we are relocating to.  */
	      check = relocation >> howto->rightshift;

	      /* If this is a signed value, the rightshift just dropped
		 leading 1 bits (assuming twos complement).  */
	      if ((bfd_signed_vma) relocation >= 0)
		signed_check = check;
	      else
		signed_check = (check
				| ((bfd_vma) - 1
				   & ~((bfd_vma) - 1 >> howto->rightshift)));

	      /* Get the value from the object file.  */
	      if (bfd_big_endian (input_bfd))
		add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
	      else
		add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));

	      /* Get the value from the object file with an appropriate sign.
		 The expression involving howto->src_mask isolates the upper
		 bit of src_mask.  If that bit is set in the value we are
		 adding, it is negative, and we subtract out that number times
		 two.  If src_mask includes the highest possible bit, then we
		 can not get the upper bit, but that does not matter since
		 signed_add needs no adjustment to become negative in that
		 case.  */
	      signed_add = add;

	      if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
		signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;

	      /* howto->bitpos == 0 */
	      /* Add the value from the object file, shifted so that it is a
		 straight number.  */
	      signed_check += signed_add;
	      relocation   += signed_add;

	      BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);

	      /* Assumes two's complement.  */
	      if (   signed_check > reloc_signed_max
		  || signed_check < reloc_signed_min)
		overflow = TRUE;

	      /* Put the relocation into the correct bits.
		 For a BLX instruction, make sure that the relocation is rounded up
		 to a word boundary.  This follows the semantics of the instruction
		 which specifies that bit 1 of the target address will come from bit
		 1 of the base address.  */
	      if (bfd_big_endian (input_bfd))
		{
		  if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
		    relocation += 2;
		  relocation = (((relocation & 0xffe) >> 1)  | ((relocation << 4) & 0x07ff0000));
		}
	      else
		{
		  if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
		    relocation += 2;
		  relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
		}

	      /* Add the relocation to the correct bits of X.  */
	      x = ((x & ~howto->dst_mask) | relocation);

	      /* Put the relocated value back in the object file.  */
	      bfd_put_32 (input_bfd, x, location);

	      rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
	    }
	}
#endif
      else
	if (bfd_link_relocatable (info) && ! howto->partial_inplace)
	    rstat = bfd_reloc_ok;
	else
	  rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
					    contents,
					    rel->r_vaddr - input_section->vma,
					    val, addend);
      /* Only perform this fix during the final link, not a relocatable link.  */
      if (! bfd_link_relocatable (info)
	  && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
	{
	  /* Determine if we need to set the bottom bit of a relocated address
	     because the address is the address of a Thumb code symbol.  */
	  int patchit = FALSE;

	  if (h != NULL
	      && (   h->symbol_class == C_THUMBSTATFUNC
		  || h->symbol_class == C_THUMBEXTFUNC))
	    {
	      patchit = TRUE;
	    }
	  else if (sym != NULL
		   && sym->n_scnum > N_UNDEF)
	    {
	      /* No hash entry - use the symbol instead.  */
	      if (   sym->n_sclass == C_THUMBSTATFUNC
		  || sym->n_sclass == C_THUMBEXTFUNC)
		patchit = TRUE;
	    }

	  if (patchit)
	    {
	      bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
	      bfd_vma	 x	  = bfd_get_32 (input_bfd, location);

	      bfd_put_32 (input_bfd, x | 1, location);
	    }
	}

      switch (rstat)
	{
	default:
	  abort ();
	case bfd_reloc_ok:
	  break;
	case bfd_reloc_outofrange:
	  _bfd_error_handler
	    /* xgettext:c-format */
	    (_("%pB: bad reloc address %#" PRIx64 " in section `%pA'"),
	     input_bfd, (uint64_t) rel->r_vaddr, input_section);
	  return FALSE;
	case bfd_reloc_overflow:
	  {
	    const char *name;
	    char buf[SYMNMLEN + 1];

	    if (symndx == -1)
	      name = "*ABS*";
	    else if (h != NULL)
	      name = NULL;
	    else
	      {
		name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
		if (name == NULL)
		  return FALSE;
	      }

	    (*info->callbacks->reloc_overflow)
	      (info, (h ? &h->root : NULL), name, howto->name,
	       (bfd_vma) 0, input_bfd, input_section,
	       rel->r_vaddr - input_section->vma);
	  }
	}
    }

  return TRUE;
}

#ifndef COFF_IMAGE_WITH_PE

bfd_boolean
bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
{
  asection *			    s;
  bfd_byte *			    foo;
  struct coff_arm_link_hash_table * globals;

  globals = coff_arm_hash_table (info);

  BFD_ASSERT (globals != NULL);

  if (globals->arm_glue_size != 0)
    {
      BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

      s = bfd_get_section_by_name
	(globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);

      BFD_ASSERT (s != NULL);

      foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);

      s->size = globals->arm_glue_size;
      s->contents = foo;
    }

  if (globals->thumb_glue_size != 0)
    {
      BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

      s = bfd_get_section_by_name
	(globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);

      BFD_ASSERT (s != NULL);

      foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);

      s->size = globals->thumb_glue_size;
      s->contents = foo;
    }

  return TRUE;
}

static void
record_arm_to_thumb_glue (struct bfd_link_info *	info,
			  struct coff_link_hash_entry * h)
{
  const char *			    name = h->root.root.string;
  register asection *		    s;
  char *			    tmp_name;
  struct coff_link_hash_entry *	    myh;
  struct bfd_link_hash_entry *	    bh;
  struct coff_arm_link_hash_table * globals;
  bfd_vma val;
  bfd_size_type amt;

  globals = coff_arm_hash_table (info);

  BFD_ASSERT (globals != NULL);
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

  s = bfd_get_section_by_name
    (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);

  BFD_ASSERT (s != NULL);

  amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
  tmp_name = bfd_malloc (amt);

  BFD_ASSERT (tmp_name);

  sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);

  myh = coff_link_hash_lookup
    (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);

  if (myh != NULL)
    {
      free (tmp_name);
      /* We've already seen this guy.  */
      return;
    }

  /* The only trick here is using globals->arm_glue_size as the value. Even
     though the section isn't allocated yet, this is where we will be putting
     it.  */
  bh = NULL;
  val = globals->arm_glue_size + 1;
  bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
				BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);

  free (tmp_name);

  globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;

  return;
}

#ifndef ARM_WINCE
static void
record_thumb_to_arm_glue (struct bfd_link_info *	info,
			  struct coff_link_hash_entry * h)
{
  const char *			     name = h->root.root.string;
  asection *			     s;
  char *			     tmp_name;
  struct coff_link_hash_entry *	     myh;
  struct bfd_link_hash_entry *	     bh;
  struct coff_arm_link_hash_table *  globals;
  bfd_vma val;
  bfd_size_type amt;

  globals = coff_arm_hash_table (info);

  BFD_ASSERT (globals != NULL);
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

  s = bfd_get_section_by_name
    (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);

  BFD_ASSERT (s != NULL);

  amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
  tmp_name = bfd_malloc (amt);

  BFD_ASSERT (tmp_name);

  sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);

  myh = coff_link_hash_lookup
    (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);

  if (myh != NULL)
    {
      free (tmp_name);
      /* We've already seen this guy.  */
      return;
    }

  bh = NULL;
  val = globals->thumb_glue_size + 1;
  bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
				BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);

  /* If we mark it 'thumb', the disassembler will do a better job.  */
  myh = (struct coff_link_hash_entry *) bh;
  myh->symbol_class = C_THUMBEXTFUNC;

  free (tmp_name);

  /* Allocate another symbol to mark where we switch to arm mode.  */

#define CHANGE_TO_ARM "__%s_change_to_arm"
#define BACK_FROM_ARM "__%s_back_from_arm"

  amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
  tmp_name = bfd_malloc (amt);

  BFD_ASSERT (tmp_name);

  sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);

  bh = NULL;
  val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
  bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
				BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);

  free (tmp_name);

  globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;

  return;
}
#endif /* not ARM_WINCE */

/* Select a BFD to be used to hold the sections used by the glue code.
   This function is called from the linker scripts in ld/emultempl/
   {armcoff/pe}.em  */

bfd_boolean
bfd_arm_get_bfd_for_interworking (bfd *			 abfd,
				  struct bfd_link_info * info)
{
  struct coff_arm_link_hash_table * globals;
  flagword			    flags;
  asection *			    sec;

  /* If we are only performing a partial link do not bother
     getting a bfd to hold the glue.  */
  if (bfd_link_relocatable (info))
    return TRUE;

  globals = coff_arm_hash_table (info);

  BFD_ASSERT (globals != NULL);

  if (globals->bfd_of_glue_owner != NULL)
    return TRUE;

  sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);

  if (sec == NULL)
    {
      flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
	       | SEC_CODE | SEC_READONLY);
      sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
					 flags);
      if (sec == NULL
	  || ! bfd_set_section_alignment (abfd, sec, 2))
	return FALSE;
    }

  sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);

  if (sec == NULL)
    {
      flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
	       | SEC_CODE | SEC_READONLY);
      sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
					 flags);

      if (sec == NULL
	  || ! bfd_set_section_alignment (abfd, sec, 2))
	return FALSE;
    }

  /* Save the bfd for later use.  */
  globals->bfd_of_glue_owner = abfd;

  return TRUE;
}

bfd_boolean
bfd_arm_process_before_allocation (bfd *		   abfd,
				   struct bfd_link_info *  info,
				   int			   support_old_code)
{
  asection * sec;
  struct coff_arm_link_hash_table * globals;

  /* If we are only performing a partial link do not bother
     to construct any glue.  */
  if (bfd_link_relocatable (info))
    return TRUE;

  /* Here we have a bfd that is to be included on the link.  We have a hook
     to do reloc rummaging, before section sizes are nailed down.  */
  _bfd_coff_get_external_symbols (abfd);

  globals = coff_arm_hash_table (info);

  BFD_ASSERT (globals != NULL);
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);

  globals->support_old_code = support_old_code;

  /* Rummage around all the relocs and map the glue vectors.  */
  sec = abfd->sections;

  if (sec == NULL)
    return TRUE;

  for (; sec != NULL; sec = sec->next)
    {
      struct internal_reloc * i;
      struct internal_reloc * rel;

      if (sec->reloc_count == 0)
	continue;

      /* Load the relocs.  */
      /* FIXME: there may be a storage leak here.  */
      i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);

      BFD_ASSERT (i != 0);

      for (rel = i; rel < i + sec->reloc_count; ++rel)
	{
	  unsigned short		 r_type	 = rel->r_type;
	  long				 symndx;
	  struct coff_link_hash_entry *	 h;

	  symndx = rel->r_symndx;

	  /* If the relocation is not against a symbol it cannot concern us.  */
	  if (symndx == -1)
	    continue;

	  /* If the index is outside of the range of our table, something has gone wrong.  */
	  if (symndx >= obj_conv_table_size (abfd))
	    {
	      /* xgettext:c-format */
	      _bfd_error_handler (_("%pB: illegal symbol index in reloc: %ld"),
				  abfd, symndx);
	      continue;
	    }

	  h = obj_coff_sym_hashes (abfd)[symndx];

	  /* If the relocation is against a static symbol it must be within
	     the current section and so cannot be a cross ARM/Thumb relocation.  */
	  if (h == NULL)
	    continue;

	  switch (r_type)
	    {
	    case ARM_26:
	      /* This one is a call from arm code.  We need to look up
		 the target of the call. If it is a thumb target, we
		 insert glue.  */

	      if (h->symbol_class == C_THUMBEXTFUNC)
		record_arm_to_thumb_glue (info, h);
	      break;

#ifndef ARM_WINCE
	    case ARM_THUMB23:
	      /* This one is a call from thumb code.  We used to look
		 for ARM_THUMB9 and ARM_THUMB12 as well.  We need to look
		 up the target of the call. If it is an arm target, we
		 insert glue.  If the symbol does not exist it will be
		 given a class of C_EXT and so we will generate a stub
		 for it.  This is not really a problem, since the link
		 is doomed anyway.  */

	      switch (h->symbol_class)
		{
		case C_EXT:
		case C_STAT:
		case C_LABEL:
		  record_thumb_to_arm_glue (info, h);
		  break;
		default:
		  ;
		}
	      break;
#endif

	    default:
	      break;
	    }
	}
    }

  return TRUE;
}

#endif /* ! defined (COFF_IMAGE_WITH_PE) */

#define coff_bfd_reloc_type_lookup		coff_arm_reloc_type_lookup
#define coff_bfd_reloc_name_lookup		coff_arm_reloc_name_lookup
#define coff_relocate_section			coff_arm_relocate_section
#define coff_bfd_is_local_label_name		coff_arm_is_local_label_name
#define coff_adjust_symndx			coff_arm_adjust_symndx
#define coff_link_output_has_begun		coff_arm_link_output_has_begun
#define coff_final_link_postscript		coff_arm_final_link_postscript
#define coff_bfd_merge_private_bfd_data		coff_arm_merge_private_bfd_data
#define coff_bfd_print_private_bfd_data		coff_arm_print_private_bfd_data
#define coff_bfd_set_private_flags		_bfd_coff_arm_set_private_flags
#define coff_bfd_copy_private_bfd_data		coff_arm_copy_private_bfd_data
#define coff_bfd_link_hash_table_create		coff_arm_link_hash_table_create

/* When doing a relocatable link, we want to convert ARM_26 relocs
   into ARM_26D relocs.  */

static bfd_boolean
coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
			struct bfd_link_info *info ATTRIBUTE_UNUSED,
			bfd *ibfd,
			asection *sec,
			struct internal_reloc *irel,
			bfd_boolean *adjustedp)
{
  if (irel->r_type == ARM_26)
    {
      struct coff_link_hash_entry *h;

      h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
      if (h != NULL
	  && (h->root.type == bfd_link_hash_defined
	      || h->root.type == bfd_link_hash_defweak)
	  && h->root.u.def.section->output_section == sec->output_section)
	irel->r_type = ARM_26D;
    }
  *adjustedp = FALSE;
  return TRUE;
}

/* Called when merging the private data areas of two BFDs.
   This is important as it allows us to detect if we are
   attempting to merge binaries compiled for different ARM
   targets, eg different CPUs or different APCS's.     */

static bfd_boolean
coff_arm_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
{
  bfd *obfd = info->output_bfd;
  BFD_ASSERT (ibfd != NULL && obfd != NULL);

  if (ibfd == obfd)
    return TRUE;

  /* If the two formats are different we cannot merge anything.
     This is not an error, since it is permissable to change the
     input and output formats.  */
  if (   ibfd->xvec->flavour != bfd_target_coff_flavour
      || obfd->xvec->flavour != bfd_target_coff_flavour)
    return TRUE;

  /* Determine what should happen if the input ARM architecture
     does not match the output ARM architecture.  */
  if (! bfd_arm_merge_machines (ibfd, obfd))
    return FALSE;

  /* Verify that the APCS is the same for the two BFDs.  */
  if (APCS_SET (ibfd))
    {
      if (APCS_SET (obfd))
	{
	  /* If the src and dest have different APCS flag bits set, fail.  */
	  if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
	    {
	      _bfd_error_handler
		/* xgettext: c-format */
		(_("error: %pB is compiled for APCS-%d, whereas %pB is compiled for APCS-%d"),
		 ibfd, APCS_26_FLAG (ibfd) ? 26 : 32,
		 obfd, APCS_26_FLAG (obfd) ? 26 : 32
		 );

	      bfd_set_error (bfd_error_wrong_format);
	      return FALSE;
	    }

	  if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
	    {
	      if (APCS_FLOAT_FLAG (ibfd))
		/* xgettext: c-format */
		_bfd_error_handler (_("\
error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
				    ibfd, obfd);
	      else
		/* xgettext: c-format */
		_bfd_error_handler (_("\
error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
				    ibfd, obfd);

	      bfd_set_error (bfd_error_wrong_format);
	      return FALSE;
	    }

	  if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
	    {
	      if (PIC_FLAG (ibfd))
		/* xgettext: c-format */
		_bfd_error_handler (_("\
error: %pB is compiled as position independent code, whereas target %pB is absolute position"),
				    ibfd, obfd);
	      else
		/* xgettext: c-format */
		_bfd_error_handler (_("\
error: %pB is compiled as absolute position code, whereas target %pB is position independent"),
				    ibfd, obfd);

	      bfd_set_error (bfd_error_wrong_format);
	      return FALSE;
	    }
	}
      else
	{
	  SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));

	  /* Set up the arch and fields as well as these are probably wrong.  */
	  bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
	}
    }

  /* Check the interworking support.  */
  if (INTERWORK_SET (ibfd))
    {
      if (INTERWORK_SET (obfd))
	{
	  /* If the src and dest differ in their interworking issue a warning.  */
	  if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
	    {
	      if (INTERWORK_FLAG (ibfd))
		/* xgettext: c-format */
		_bfd_error_handler (_("\
warning: %pB supports interworking, whereas %pB does not"),
				    ibfd, obfd);
	      else
		/* xgettext: c-format */
		_bfd_error_handler (_("\
warning: %pB does not support interworking, whereas %pB does"),
				    ibfd, obfd);
	    }
	}
      else
	{
	  SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
	}
    }

  return TRUE;
}

/* Display the flags field.  */

static bfd_boolean
coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
{
  FILE * file = (FILE *) ptr;

  BFD_ASSERT (abfd != NULL && ptr != NULL);

  fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);

  if (APCS_SET (abfd))
    {
      /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated.  */
      fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);

      if (APCS_FLOAT_FLAG (abfd))
	fprintf (file, _(" [floats passed in float registers]"));
      else
	fprintf (file, _(" [floats passed in integer registers]"));

      if (PIC_FLAG (abfd))
	fprintf (file, _(" [position independent]"));
      else
	fprintf (file, _(" [absolute position]"));
    }

  if (! INTERWORK_SET (abfd))
    fprintf (file, _(" [interworking flag not initialised]"));
  else if (INTERWORK_FLAG (abfd))
    fprintf (file, _(" [interworking supported]"));
  else
    fprintf (file, _(" [interworking not supported]"));

  fputc ('\n', file);

  return TRUE;
}

/* Copies the given flags into the coff_tdata.flags field.
   Typically these flags come from the f_flags[] field of
   the COFF filehdr structure, which contains important,
   target specific information.
   Note: Although this function is static, it is explicitly
   called from both coffcode.h and peicode.h.  */

static bfd_boolean
_bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
{
  flagword flag;

  BFD_ASSERT (abfd != NULL);

  flag = (flags & F_APCS26) ? F_APCS_26 : 0;

  /* Make sure that the APCS field has not been initialised to the opposite
     value.  */
  if (APCS_SET (abfd)
      && (   (APCS_26_FLAG    (abfd) != flag)
	  || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
	  || (PIC_FLAG	      (abfd) != (flags & F_PIC))
	  ))
    return FALSE;

  flag |= (flags & (F_APCS_FLOAT | F_PIC));

  SET_APCS_FLAGS (abfd, flag);

  flag = (flags & F_INTERWORK);

  /* If the BFD has already had its interworking flag set, but it
     is different from the value that we have been asked to set,
     then assume that that merged code will not support interworking
     and set the flag accordingly.  */
  if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
    {
      if (flag)
	_bfd_error_handler (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
			    abfd);
      else
	_bfd_error_handler (_("warning: clearing the interworking flag of %pB due to outside request"),
			    abfd);
      flag = 0;
    }

  SET_INTERWORK_FLAG (abfd, flag);

  return TRUE;
}

/* Copy the important parts of the target specific data
   from one instance of a BFD to another.  */

static bfd_boolean
coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
{
  BFD_ASSERT (src != NULL && dest != NULL);

  if (src == dest)
    return TRUE;

  /* If the destination is not in the same format as the source, do not do
     the copy.  */
  if (src->xvec != dest->xvec)
    return TRUE;

  /* Copy the flags field.  */
  if (APCS_SET (src))
    {
      if (APCS_SET (dest))
	{
	  /* If the src and dest have different APCS flag bits set, fail.  */
	  if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
	    return FALSE;

	  if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
	    return FALSE;

	  if (PIC_FLAG (dest) != PIC_FLAG (src))
	    return FALSE;
	}
      else
	SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
			| PIC_FLAG (src));
    }

  if (INTERWORK_SET (src))
    {
      if (INTERWORK_SET (dest))
	{
	  /* If the src and dest have different interworking flags then turn
	     off the interworking bit.  */
	  if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
	    {
	      if (INTERWORK_FLAG (dest))
		{
		  /* xgettext:c-format */
		  _bfd_error_handler (_("\
warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
				      dest, src);
		}

	      SET_INTERWORK_FLAG (dest, 0);
	    }
	}
      else
	{
	  SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
	}
    }

  return TRUE;
}

/* Note:  the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
   *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h.  */
#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX ""
#endif
#ifndef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX "_"
#endif

/* Like _bfd_coff_is_local_label_name, but
   a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
      non-local.
   b) Allow other prefixes than ".", e.g. an empty prefix would cause all
      labels of the form Lxxx to be stripped.  */

static bfd_boolean
coff_arm_is_local_label_name (bfd *	   abfd ATTRIBUTE_UNUSED,
			      const char * name)
{
#ifdef USER_LABEL_PREFIX
  if (USER_LABEL_PREFIX[0] != 0)
    {
      size_t len = strlen (USER_LABEL_PREFIX);

      if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
	return FALSE;
    }
#endif

#ifdef LOCAL_LABEL_PREFIX
  /* If there is a prefix for local labels then look for this.
     If the prefix exists, but it is empty, then ignore the test.  */

  if (LOCAL_LABEL_PREFIX[0] != 0)
    {
      size_t len = strlen (LOCAL_LABEL_PREFIX);

      if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
	return FALSE;

      /* Perform the checks below for the rest of the name.  */
      name += len;
    }
#endif

  return name[0] == 'L';
}

/* This piece of machinery exists only to guarantee that the bfd that holds
   the glue section is written last.

   This does depend on bfd_make_section attaching a new section to the
   end of the section list for the bfd.  */

static bfd_boolean
coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
{
  return (sub->output_has_begun
	  || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
}

static bfd_boolean
coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
				struct coff_final_link_info * pfinfo)
{
  struct coff_arm_link_hash_table * globals;

  globals = coff_arm_hash_table (pfinfo->info);

  BFD_ASSERT (globals != NULL);

  if (globals->bfd_of_glue_owner != NULL)
    {
      if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
	return FALSE;

      globals->bfd_of_glue_owner->output_has_begun = TRUE;
    }

  return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
}

#ifndef bfd_pe_print_pdata
#define bfd_pe_print_pdata	NULL
#endif

#include "coffcode.h"

#ifndef TARGET_LITTLE_SYM
#define TARGET_LITTLE_SYM arm_coff_le_vec
#endif
#ifndef TARGET_LITTLE_NAME
#define TARGET_LITTLE_NAME "coff-arm-little"
#endif
#ifndef TARGET_BIG_SYM
#define TARGET_BIG_SYM arm_coff_be_vec
#endif
#ifndef TARGET_BIG_NAME
#define TARGET_BIG_NAME "coff-arm-big"
#endif

#ifndef TARGET_UNDERSCORE
#define TARGET_UNDERSCORE 0
#endif

#ifndef EXTRA_S_FLAGS
#ifdef COFF_WITH_PE
#define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
#else
#define EXTRA_S_FLAGS SEC_CODE
#endif
#endif

/* Forward declaration for use initialising alternative_target field.  */
extern const bfd_target TARGET_BIG_SYM ;

/* Target vectors.  */
CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)