From f1a0a99c04fb1b1a66a451cd01f58c69f8e593e3 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 1 Jan 2023 21:32:29 -0500 Subject: sim: or1k: hoist cgen rules to top-level --- sim/Makefile.in | 10 ++++++++++ sim/or1k/Makefile.in | 34 ---------------------------------- sim/or1k/local.mk | 11 +++++++++++ 3 files changed, 21 insertions(+), 34 deletions(-) (limited to 'sim') diff --git a/sim/Makefile.in b/sim/Makefile.in index e420ef1..4f76590 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -3985,6 +3985,16 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@ +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode + +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch: +@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH) +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch + +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode: +@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode + @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT) @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@ diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in index 6b2a976..ca5bf1a 100644 --- a/sim/or1k/Makefile.in +++ b/sim/or1k/Makefile.in @@ -45,37 +45,3 @@ SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 ## COMMON_POST_CONFIG_FRAG arch = or1k - -stamps: stamp-arch stamp-cpu - -# NOTE: Generated source files are specified as full paths, -# e.g. $(srcdir)/arch.c, because make may decide the files live -# in objdir otherwise. - -OR1K_CGEN_DEPS = \ - $(CPU_DIR)/or1k.cpu \ - $(CPU_DIR)/or1k.opc \ - $(CPU_DIR)/or1kcommon.cpu \ - $(CPU_DIR)/or1korbis.cpu \ - $(CPU_DIR)/or1korfpx.cpu \ - Makefile - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS) - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \ - mach=or32,or32nd \ - archfile=$(CPU_DIR)/or1k.cpu \ - FLAGS="with-scache" - $(SILENCE) touch $@ -$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch - @true - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS) - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=or1k32bf \ - mach=or32,or32nd \ - archfile=$(CPU_DIR)/or1k.cpu \ - FLAGS="with-scache" \ - EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - $(SILENCE) touch $@ -$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu - @true diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk index b332bfa..b118143 100644 --- a/sim/or1k/local.mk +++ b/sim/or1k/local.mk @@ -46,3 +46,14 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS) $(AM_V_at)touch $@ MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS) + +## Target that triggers all cgen targets that works when --disable-cgen-maint. +%D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode + +%D%/cgen-arch: + $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH) +%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch + +%D%/cgen-cpu-decode: + $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +%D%/cpu.h %D%/cpu.c %D%/model.c %D%/sem.c %D%/sem-switch.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode -- cgit v1.1