From 917bca4f210f0b654abbb8497dd4f8abe5bf9e9f Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 28 Feb 2001 01:04:24 +0000 Subject: Add support for disabling alignment checks when performing GDB interface calls or SWI emulaiton routines. (Alignment checking code has not yet been contributed). --- sim/arm/ChangeLog | 30 ++++++++++++++++++++++++++++++ sim/arm/armcopro.c | 13 +++++++------ sim/arm/armdefs.h | 3 +++ sim/arm/armemu.c | 4 ++-- sim/arm/armemu.h | 2 +- sim/arm/armos.c | 27 +++++++-------------------- sim/arm/armvirt.c | 50 ++++++++++++++++++++++++++++++++++++++++---------- sim/arm/wrapper.c | 10 +++++----- 8 files changed, 95 insertions(+), 44 deletions(-) (limited to 'sim') diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 7ed494d..fd11ec1 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,33 @@ +2001-02-27 Nick Clifton + + * armvirt.c (GetWord): Add new parameter - check - to enable or + disable the alignment checking. + (PutWord): Add new parameter - check - to enable or disable the + alignment checking. + (ARMul_ReLoadInstr): Pass extra parameter to GetWord. + (ARMul_ReadWord): Pass extra parameter to GetWord. + (ARMul_WriteWord): Pass extra parameter to PutWord. + (ARMul_StoreHalfWord): Pass extra parameter to PutWord. + (ARMul_WriteByte): Pass extra parameter to GetWord. + (ARMul_SwapWord): Pass extra parameter to PutWord. + (ARMul_SafeReadByte): New Function: Read a byte but do not abort. + (ARMul_SafeWriteByte): New Function: Write a byte but do not abort. + + * armdefs.h: Add prototypes for ARMul_SafeReadByte and + ARMul_SafeWriteByte. + + * wrapper.c (sim_write): Use ARMul_SafeWriteByte. + (sim_read): Use ARMul_SafeReadByte. + + * armos.c (in_SWI_handler): Remove. + (SWIWrite0): Use ARMul_SafeReadByte. + (WriteCommandLineTo): Use ARMul_SafeWriteByte. + (SWIopen): Use ARMul_SafeReadByte. + (SWIread): Use ARMul_SafeWriteByte. + (SWIwrite): Use ARMul_SafeReadByte. + (ARMul_OSHandleSWI): Remove use of is_SWI_handler. + (ARMul_OSException): Remove use of is_SWI_handler. + 2001-02-16 Nick Clifton * armemu.c: Remove Prefetch abort for breakpoints. Instead set diff --git a/sim/arm/armcopro.c b/sim/arm/armcopro.c index db7ee60..8605dcf 100644 --- a/sim/arm/armcopro.c +++ b/sim/arm/armcopro.c @@ -16,6 +16,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "armdefs.h" +#include "armos.h" #include "armemu.h" #include "ansidecl.h" @@ -211,7 +212,7 @@ check_cp15_access (ARMul_State * state, /* Store a value into one of coprocessor 15's registers. */ void -write_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value) +write_cp15_reg (ARMul_State * state, unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value) { if (opcode_2) { @@ -324,9 +325,9 @@ write_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value) return; } -/* Return the value in a cp13 register. */ +/* Return the value in a cp15 register. */ -static ARMword +ARMword read_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm) { if (opcode_2 == 0) @@ -364,7 +365,7 @@ XScale_cp15_LDC (ARMul_State * state, unsigned type, ARMword instr, ARMword data result = check_cp15_access (state, reg, 0, 0, 0); if (result == ARMul_DONE && type == ARMul_DATA) - write_cp15_reg (reg, 0, 0, data); + write_cp15_reg (state, reg, 0, 0, data); return result; } @@ -416,7 +417,7 @@ XScale_cp15_MCR (ARMul_State * state, result = check_cp15_access (state, reg, CRm, BITS (21, 23), opcode_2); if (result == ARMul_DONE) - write_cp15_reg (reg, opcode_2, CRm, value); + write_cp15_reg (state, reg, opcode_2, CRm, value); return result; } @@ -440,7 +441,7 @@ XScale_cp15_write_reg (ARMul_State * state ATTRIBUTE_UNUSED, { /* FIXME: Not sure what to do about the alternative register set here. For now default to just accessing CRm == 0 registers. */ - write_cp15_reg (reg, 0, 0, value); + write_cp15_reg (state, reg, 0, 0, value); return TRUE; } diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h index 204dc6b..4ad5c5f 100644 --- a/sim/arm/armdefs.h +++ b/sim/arm/armdefs.h @@ -317,10 +317,13 @@ extern void ARMul_Ccycles (ARMul_State * state, unsigned number, extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address); extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address); +extern ARMword ARMul_SafeReadByte (ARMul_State * state, ARMword address); extern void ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data); extern void ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data); +extern void ARMul_SafeWriteByte (ARMul_State * state, ARMword address, + ARMword data); extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 6b963c7..dcc505f 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -1369,8 +1369,8 @@ ARMul_Emulate26 (register ARMul_State * state) value |= 0xc; write_cp14_reg (10, value); - write_cp15_reg (5, 0, 0, 0x200); /* Set FSR. */ - write_cp15_reg (6, 0, 0, pc); /* Set FAR. */ + write_cp15_reg (state, 5, 0, 0, 0x200); /* Set FSR. */ + write_cp15_reg (state, 6, 0, 0, pc); /* Set FAR. */ } else break; diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h index 4d4406d..009e9c8 100644 --- a/sim/arm/armemu.h +++ b/sim/arm/armemu.h @@ -491,6 +491,6 @@ extern void ARMul_CoProAttach (ARMul_State *, unsigned, ARMul_CPInits *, ARM ARMul_LDCs *, ARMul_STCs *, ARMul_MRCs *, ARMul_MCRs *, ARMul_CDPs *, ARMul_CPReads *, ARMul_CPWrites *); extern void ARMul_CoProDetach (ARMul_State *, unsigned); -extern void write_cp15_reg (unsigned, unsigned, unsigned, ARMword); +extern void write_cp15_reg (ARMul_State *, unsigned, unsigned, unsigned, ARMword); extern void write_cp14_reg (unsigned, ARMword); extern ARMword read_cp14_reg (unsigned); diff --git a/sim/arm/armos.c b/sim/arm/armos.c index 678f177..93dcbd8 100644 --- a/sim/arm/armos.c +++ b/sim/arm/armos.c @@ -139,9 +139,6 @@ static ARMword softvectorcode[] = 0xe1a0f00e /* Default handler */ }; -/* Set to prevent aborts when emulating SWI routines. */ -static int in_SWI_handler = 0; - /* Time for the Operating System to initialise itself. */ unsigned @@ -260,7 +257,7 @@ SWIWrite0 (ARMul_State * state, ARMword addr) ARMword temp; struct OSblock *OSptr = (struct OSblock *) state->OSptr; - while ((temp = ARMul_ReadByte (state, addr++)) != 0) + while ((temp = ARMul_SafeReadByte (state, addr++)) != 0) (void) fputc ((char) temp, stdout); OSptr->ErrorNo = errno; @@ -277,7 +274,7 @@ WriteCommandLineTo (ARMul_State * state, ARMword addr) do { temp = (ARMword) * cptr++; - ARMul_WriteByte (state, addr++, temp); + ARMul_SafeWriteByte (state, addr++, temp); } while (temp != 0); } @@ -290,7 +287,7 @@ SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags) int flags; int i; - for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++) + for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++) ; /* Now we need to decode the Demon open mode. */ @@ -329,7 +326,7 @@ SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len) res = read (f, local, len); if (res > 0) for (i = 0; i < res; i++) - ARMul_WriteByte (state, ptr + i, local[i]); + ARMul_SafeWriteByte (state, ptr + i, local[i]); free (local); state->Reg[0] = res == -1 ? -1 : len - res; @@ -352,7 +349,7 @@ SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len) } for (i = 0; i < len; i++) - local[i] = ARMul_ReadByte (state, ptr + i); + local[i] = ARMul_SafeReadByte (state, ptr + i); res = write (f, local, len); state->Reg[0] = res == -1 ? -1 : len - res; @@ -393,8 +390,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number) ARMword saved_number = 0; struct OSblock * OSptr = (struct OSblock *) state->OSptr; - in_SWI_handler = 1; - /* Intel do not want DEMON SWI support. */ if (state->is_XScale) switch (number) @@ -516,7 +511,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number) case AngelSWI_Reason_EnterSVC: default: state->Emulate = FALSE; - in_SWI_handler = 0; return FALSE; case AngelSWI_Reason_Clock: @@ -539,7 +533,7 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number) break; case AngelSWI_Reason_WriteC: - (void) fputc ((int) ARMul_ReadByte (state, addr), stdout); + (void) fputc ((int) ARMul_SafeReadByte (state, addr), stdout); OSptr->ErrorNo = errno; /* Fall thgrough. */ @@ -633,8 +627,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number) break; default: - in_SWI_handler = 0; - /* If there is a SWI vector installed use it. */ if (state->is_XScale && saved_number != -1) number = saved_number; @@ -665,7 +657,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number) } } - in_SWI_handler = 0; return TRUE; } @@ -682,11 +673,7 @@ ARMul_OSException (ARMul_State * state ATTRIBUTE_UNUSED, ARMword vector ATTRIBUTE_UNUSED, ARMword pc ATTRIBUTE_UNUSED) { - /* If we are inside a SWI handler routine, then ignore any exceptions. - They could be caused by data exceptions for misaligned reads, for - example, but for the purposes of emulating a SWI, we do not care. */ - - return in_SWI_handler; + return FALSE; } #endif diff --git a/sim/arm/armvirt.c b/sim/arm/armvirt.c index b9a018b..cca6aa0 100644 --- a/sim/arm/armvirt.c +++ b/sim/arm/armvirt.c @@ -24,6 +24,7 @@ freed as they might be needed again. A single area of memory may be defined to generate aborts. */ #include "armopts.h" +#include "armos.h" #include "armdefs.h" #include "ansidecl.h" @@ -56,7 +57,7 @@ int SWI_vector_installed = FALSE; \***************************************************************************/ static ARMword -GetWord (ARMul_State * state, ARMword address) +GetWord (ARMul_State * state, ARMword address, int check) { ARMword page; ARMword offset; @@ -89,7 +90,7 @@ GetWord (ARMul_State * state, ARMword address) \***************************************************************************/ static void -PutWord (ARMul_State * state, ARMword address, ARMword data) +PutWord (ARMul_State * state, ARMword address, ARMword data, int check) { ARMword page; ARMword offset; @@ -191,8 +192,8 @@ ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize) if ((isize == 2) && (address & 0x2)) { /* We return the next two halfwords: */ - ARMword lo = GetWord (state, address); - ARMword hi = GetWord (state, address + 4); + ARMword lo = GetWord (state, address, TRUE); + ARMword hi = GetWord (state, address + 4, TRUE); if (state->bigendSig == HIGH) return (lo << 16) | (hi >> 16); @@ -200,7 +201,7 @@ ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize) return ((hi & 0xFFFF) << 16) | (lo >> 16); } - return GetWord (state, address); + return GetWord (state, address, TRUE); } /***************************************************************************\ @@ -250,7 +251,7 @@ ARMword ARMul_ReadWord (ARMul_State * state, ARMword address) } #endif - return GetWord (state, address); + return GetWord (state, address, TRUE); } /***************************************************************************\ @@ -335,7 +336,7 @@ ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data) } #endif - PutWord (state, address, data); + PutWord (state, address, data, TRUE); } /***************************************************************************\ @@ -388,7 +389,8 @@ ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data) offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */ PutWord (state, address, - (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset)); + (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset), + TRUE); } /***************************************************************************\ @@ -404,7 +406,8 @@ ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data) offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */ PutWord (state, address, - (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset)); + (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset), + TRUE); } /***************************************************************************\ @@ -444,7 +447,7 @@ ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data) state->NumNcycles++; - PutWord (state, address, data); + PutWord (state, address, data, TRUE); return temp; } @@ -484,3 +487,30 @@ ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_U state->NumCcycles += number; ARMul_CLEARABORT; } + + +/* Read a byte. Do not check for alignment or access errors. */ + +ARMword +ARMul_SafeReadByte (ARMul_State * state, ARMword address) +{ + ARMword temp, offset; + + temp = GetWord (state, address, FALSE); + offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; + + return (temp >> offset & 0xffL); +} + +void +ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data) +{ + ARMword temp, offset; + + temp = GetWord (state, address, FALSE); + offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; + + PutWord (state, address, + (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset), + FALSE); +} diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index 242f0bb..877f7fb 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -1,5 +1,5 @@ /* run front end support for arm - Copyright (C) 1995, 1996, 1997, 2000 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 2000, 2001 Free Software Foundation, Inc. This file is part of ARM SIM. @@ -126,7 +126,7 @@ sim_write (sd, addr, buffer, size) init (); for (i = 0; i < size; i++) - ARMul_WriteByte (state, addr + i, buffer[i]); + ARMul_SafeWriteByte (state, addr + i, buffer[i]); return size; } @@ -139,11 +139,11 @@ sim_read (sd, addr, buffer, size) int size; { int i; + init (); for (i = 0; i < size; i++) - { - buffer[i] = ARMul_ReadByte (state, addr + i); - } + buffer[i] = ARMul_SafeReadByte (state, addr + i); + return size; } -- cgit v1.1