From dd0f610960df9101a17aaab80682457d9c27aced Mon Sep 17 00:00:00 2001 From: Andrew Cagney Date: Thu, 5 Nov 1998 09:42:05 +0000 Subject: PR 16522 Fix RSQRT.S instruction, add test case. --- sim/mips/ChangeLog | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'sim/mips') diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 4b05f8a..245053b 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,17 @@ +start-sanitize-r5900 +Thu Nov 5 19:40:12 1998 Andrew Cagney + + * r5900.igen (DIV): Do not clear clear SO/SU when already set. + + * r5900.igen (RSQRT.S): Do not compute 1/srqt(abs(T)) when T + negative, compute S/sqrt(abs(T)) instead. Correctly set FCSR + bits. + + * r5900.igen (RSQRT.S): Handle overflow/underflow better. Check + sign of FT not FS. + (r59fp_store): Clarify "bad value" abort messages. + +end-sanitize-r5900 start-sanitize-tx3904 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler -- cgit v1.1