From dce75bf9848c88583377c608e9734a2f8616d12b Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Fri, 10 Feb 2017 14:18:23 +1000 Subject: POWER9 add scv/rfscv instruction support opcodes/ * ppc-opc.c (powerpc_opcodes) : New mnemonics. gas/ * testsuite/gas/ppc/power9.d : New tests. --- opcodes/ChangeLog | 4 ++++ opcodes/ppc-opc.c | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 2185484..8366d1b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2017-02-10 Nicholas Piggin + + * ppc-opc.c (powerpc_opcodes) : New mnemonics. + 2017-02-03 Nick Clifton PR 21096 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 0a71dc8..9ac779c 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -441,7 +441,7 @@ const struct powerpc_operand powerpc_operands[] = #define L2OPT L32OPT + 1 { 0x3, 21, NULL, NULL, PPC_OPERAND_OPTIONAL }, - /* The LEV field in a POWER SVC form instruction. */ + /* The LEV field in a POWER SVC / POWER9 SCV form instruction. */ #define SVC_LEV L2OPT + 1 { 0x7f, 5, NULL, NULL, 0 }, @@ -4142,6 +4142,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"bcla", B(16,1,1), B_MASK, COM, PPCVLE, {BO, BI, BDA}}, {"svc", SC(17,0,0), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}}, +{"scv", SC(17,0,1), SC_MASK, POWER9, PPCVLE, {SVC_LEV}}, {"svcl", SC(17,0,1), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}}, {"sc", SC(17,1,0), SC_MASK, PPC, PPCVLE, {LEV}}, {"svca", SC(17,1,0), SC_MASK, PWRCOM, PPCVLE, {SV}}, @@ -4391,6 +4392,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"rfi", XL(19,50), 0xffffffff, COM, PPCVLE, {0}}, {"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}}, +{"rfscv", XL(19,82), 0xffffffff, POWER9, PPCVLE, {0}}, {"rfsvc", XL(19,82), 0xffffffff, POWER, PPCVLE, {0}}, {"rfgi", XL(19,102), 0xffffffff, E500MC|PPCA2, PPCVLE, {0}}, -- cgit v1.1