From c9ae58fe32e88914b67988d5bfde184f79c7070f Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sat, 4 Jan 2020 08:11:43 +1030 Subject: ubsan: m32r: left shift of negative value cpu/ * m32r.cpu (f-disp8): Avoid left shift of negative values. (f-disp16, f-disp24): Likewise. opcodes/ * m32r-ibld.c: Regenerate. --- opcodes/ChangeLog | 4 ++++ opcodes/m32r-ibld.c | 6 +++--- 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d72dcec..5dfb1fc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2020-01-04 Alan Modra + * m32r-ibld.c: Regenerate. + +2020-01-04 Alan Modra + * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value. 2020-01-04 Alan Modra diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c index 9ab98cf..8d5ce60 100644 --- a/opcodes/m32r-ibld.c +++ b/opcodes/m32r-ibld.c @@ -723,7 +723,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<f_disp16 = value; } break; @@ -731,7 +731,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<f_disp24 = value; } break; @@ -739,7 +739,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<f_disp8 = value; } break; -- cgit v1.1