From 23e69e47b4cb274e848e0f06e240cdf43b8e0a69 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sun, 7 Jul 2013 10:00:43 +0000 Subject: include/opcode/ * mips.h: Update documentation of "+s" and "+S". opcodes/ * mips-opc.c (mips_builtin_opcodes): Use "+s" for "cins32" and "+S" for "cins". * mips-dis.c (print_mips_arg): Update "+s" and "+S" comments. Combine cases. gas/ * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p". Require the msb to be <= 31 for "+s". Check that the size is <= 31 for both "+s" and "+S". --- opcodes/ChangeLog | 7 +++++++ opcodes/mips-dis.c | 7 ++----- opcodes/mips-opc.c | 8 ++++---- 3 files changed, 13 insertions(+), 9 deletions(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 68b263f..4521f91 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2013-07-07 Richard Sandiford + * mips-opc.c (mips_builtin_opcodes): Use "+s" for "cins32" and + "+S" for "cins". + * mips-dis.c (print_mips_arg): Update "+s" and "+S" comments. + Combine cases. + +2013-07-07 Richard Sandiford + * mips-opc.c (mips_builtin_opcodes): Use "+i" rather than "a" for "jalx". * mips16-opc.c (mips16_opcodes): Likewise. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 9ef7247..5777232 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1072,11 +1072,8 @@ print_insn_args (const char *d, infprintf (is, "0x%x", GET_OP (l, CINSPOS)); break; - case 's': /* cins and exts length-minus-one */ - infprintf (is, "0x%x", GET_OP (l, CINSLM1)); - break; - - case 'S': /* cins32 and exts32 length-minus-one field */ + case 's': /* cins32 and exts32 length-minus-one */ + case 'S': /* cins and exts length-minus-one field */ infprintf (is, "0x%x", GET_OP (l, CINSLM1)); break; diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 6d709ee..26ecea4 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -625,9 +625,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"cftc1", "d,E", 0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0, 0, MT32 }, {"cftc1", "d,T", 0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0, 0, MT32 }, {"cftc2", "d,E", 0x41000025, 0xffe007ff, TRAP|LCD|WR_d|RD_C2, 0, 0, MT32, IOCT|IOCTP|IOCT2 }, -{"cins32", "t,r,+p,+S",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT }, +{"cins32", "t,r,+p,+s",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"cins", "t,r,+P,+S",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT }, /* cins32 */ -{"cins", "t,r,+p,+s",0x70000032, 0xfc00003f, WR_t|RD_s, 0, IOCT }, +{"cins", "t,r,+p,+S",0x70000032, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 }, {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 }, {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1, 0, IOCT|IOCTP|IOCT2 }, @@ -813,9 +813,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32 }, {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, 0, MT32 }, {"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33 }, -{"exts32", "t,r,+p,+S",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT }, +{"exts32", "t,r,+p,+s",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"exts", "t,r,+P,+S",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT }, /* exts32 */ -{"exts", "t,r,+p,+s",0x7000003a, 0xfc00003f, WR_t|RD_s, 0, IOCT }, +{"exts", "t,r,+p,+S",0x7000003a, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, 0, I3_33 }, {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3_33 }, {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2, 0, SF }, -- cgit v1.1