From 13c02f06ff791ad9a09b562b141f07d9cefd52f8 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 13 Feb 2011 18:55:22 +0000 Subject: opcodes: blackfin: fix decoding of ABS The single cycle dual mac ABS insn was incorrectly decoding the mac1 part of the insn. Once we fix the decode, update the gas tests to have the correct output. Signed-off-by: Mike Frysinger --- opcodes/ChangeLog | 4 ++++ opcodes/bfin-dis.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f067150..364e7c2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2011-02-13 Mike Frysinger + * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. + +2011-02-13 Mike Frysinger + * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output dregs only when P is set, and dregs_lo otherwise. diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index e7646c9..3932762 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -3476,7 +3476,7 @@ decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, " = (A0 += A1)"); } else if (aop == 3 && HL == 0 && aopcde == 16) - OUTS (outf, "A1 = ABS A0, A0 = ABS A0"); + OUTS (outf, "A1 = ABS A1, A0 = ABS A0"); else if (aop == 0 && aopcde == 23 && HL == 1) { -- cgit v1.1