From 8f595e9b4fd0a3a74d53ddffd69f2825627ae5c6 Mon Sep 17 00:00:00 2001 From: Nelson Chu Date: Wed, 20 May 2020 17:22:48 +0100 Subject: [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions and CSR 1. Remove the -mriscv-isa-version and --with-riscv-isa-version options. We can still use -march to choose the version for each extensions, so there is no need to add these. 2. Change the arguments of options from [1p9|1p9p1|...] to [1.9|1.9.1|...]. Unlike the architecture string has specified by spec, ther is no need to do the same thing for options. 3. Spilt the patches to reduce the burdens of review. [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions to [PATCH v2 3/9] RISC-V: Support GAS option -misa-spec to set ISA versions [PATCH v2 4/9] RISC-V: Support configure options to set ISA versions by default. [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version. to [PATCH v2 5/9] RISC-V: Support version checking for CSR according to privilege spec version. [PATCH v2 6/9] RISC-V: Support configure option to choose the privilege spec version. 4. Use enum class rather than string to compare the choosen ISA spec in opcodes/riscv-opc.c. The behavior is same as comparing the choosen privilege spec. include * opcode/riscv.h: Include "bfd.h" to support bfd_boolean. (enum riscv_isa_spec_class): New enum class. All supported ISA spec belong to one of the class (struct riscv_ext_version): New structure holds version information for the specific ISA. * opcode/riscv-opc.h (DECLARE_CSR): There are two version information, define_version and abort_version. The define_version means which privilege spec is started to define the CSR, and the abort_version means which privilege spec is started to abort the CSR. If the CSR is valid for the newest spec, then the abort_version should be PRIV_SPEC_CLASS_DRAFT. (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR. * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define the current supported privilege spec versions. (struct riscv_csr_extra): Add new fields to store more information about the CSR. We use these information to find the suitable CSR address when user choosing a specific privilege spec. binutils * dwarf.c: Updated since DECLARE_CSR is changed. opcodes * riscv-opc.c (riscv_ext_version_table): The table used to store all information about the supported spec and the corresponding ISA versions. Currently, only Zicsr is supported to verify the correctness of Z sub extension settings. Others will be supported in the future patches. (struct isa_spec_t, isa_specs): List for all supported ISA spec classes and the corresponding strings. (riscv_get_isa_spec_class): New function. Get the corresponding ISA spec class by giving a ISA spec string. * riscv-opc.c (struct priv_spec_t): New structure. (struct priv_spec_t priv_specs): List for all supported privilege spec classes and the corresponding strings. (riscv_get_priv_spec_class): New function. Get the corresponding privilege spec class by giving a spec string. (riscv_get_priv_spec_name): New function. Get the corresponding privilege spec string by giving a CSR version class. * riscv-dis.c: Updated since DECLARE_CSR is changed. * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR according to the chosen version. Build a hash table riscv_csr_hash to store the valid CSR for the chosen pirv verison. Dump the direct CSR address rather than it's name if it is invalid. (parse_riscv_dis_option_without_args): New function. Parse the options without arguments. (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to parse the options without arguments first, and then handle the options with arguments. Add the new option -Mpriv-spec, which has argument. * riscv-dis.c (print_riscv_disassembler_options): Add description about the new OBJDUMP option. ld * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated priv attributes according to the -mpriv-spec option. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise. bfd * elfxx-riscv.h (riscv_parse_subset_t): Add new callback function get_default_version. It is used to find the default version for the specific extension. * elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters default_major_version and default_minor_version. Add new bfd_boolean parameter *use_default_version. Set it to TRUE if we need to call the callback rps->get_default_version to find the default version. (riscv_parse_std_ext): Call rps->get_default_version if we fail to find the default version in riscv_parsing_subset_version, and then call riscv_add_subset to add the subset into subset list. (riscv_parse_prefixed_ext): Likewise. (riscv_std_z_ext_strtab): Support Zicsr extensions. * elfnn-riscv.c (riscv_merge_std_ext): Use strcasecmp to compare the strings rather than characters. riscv_merge_arch_attr_info): The callback function get_default_version is only needed for assembler, so set it to NULL int the linker. * elfxx-riscv.c (riscv_estimate_digit): Remove the static. * elfxx-riscv.h: Updated. gas * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated. * config/tc-riscv.c (default_arch_with_ext, default_isa_spec): Static variables which are used to set the ISA extensions. You can use -march (or ELF build attributes) and -misa-spec to set them, respectively. (ext_version_hash): The hash table used to handle the extensions with versions. (init_ext_version_hash): Initialize the ext_version_hash according to riscv_ext_version_table. (riscv_get_default_ext_version): The callback function of riscv_parse_subset_t. According to the choosed ISA spec, get the default version for the specific extension. (riscv_set_arch): Set the callback function. (enum options, struct option md_longopts): Add new option -misa-spec. (md_parse_option): Do not call riscv_set_arch for -march. We will call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class to set default_isa_spec class. (riscv_after_parse_args): Call init_ext_version_hash to initialize the ext_version_hash, and then call riscv_set_arch to set the architecture with versions according to default_arch_with_ext. * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for x extensions. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we already set it's version to 2p1 by march, so no need to use the default 2p2 version. For m-ext, we do not set the version by -march and ELF arch attribute, so set the default 2p0 to it. For zicsr, it is not defined in ISA spec 2p2, so set 0p0 to it. * testsuite/gas/riscv/attribute-10.d: New testcase. The version of zicsr is 2p0 according to ISA spec 20191213. * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT) (DEFAULT_RISCV_ISA_SPEC): Default configure option settings. You can set them by configure options --with-arch and --with-isa-spec, respectively. (riscv_set_default_isa_spec): New function used to set the default ISA spec. (md_parse_option): Call riscv_set_default_isa_spec rather than call riscv_get_isa_spec_class directly. (riscv_after_parse_args): If the -isa-spec is not set, then we set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by calling riscv_set_default_isa_spec. * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since the --with-isa-spec may be set to different ISA spec. * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * configure.ac: Add configure options, --with-arch and --with-isa-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (default_priv_spec): Static variable which is used to check if the CSR is valid for the chosen privilege spec. You can use -mpriv-spec to set it. (enum reg_class): We now get the CSR address from csr_extra_hash rather than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX. (riscv_init_csr_hashes): Only need to initialize one hash table csr_extra_hash. (riscv_csr_class_check): Change the return type to void. Don't check the ISA dependency if -mcsr-check isn't set. (riscv_csr_version_check): New function. Check and find the CSR address from csr_extra_hash, according to default_priv_spec. Report warning for the invalid CSR if -mcsr-check is set. (reg_csr_lookup_internal): Updated. (reg_lookup_internal): Likewise. (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed. (enum options, struct option md_longopts): Add new GAS option -mpriv-spec. (md_parse_option): Call riscv_set_default_priv_version to set default_priv_spec. (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default privilege spec to the newest one. (enum riscv_csr_class, struct riscv_csr_extra): Move them to include/opcode/riscv.h. * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want to check the ISA dependency for CSR, so fix the spec version by adding -mpriv-spec=1.11. * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some version warnings for the test case. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case. Check whether the CSR is valid when privilege version 1.9 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case. Check whether the CSR is valid when privilege version 1.9.1 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case. Check whether the CSR is valid when privilege version 1.10 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case. Check whether the CSR is valid when privilege version 1.11 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise. * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option setting. You can set it by configure option --with-priv-spec. (riscv_set_default_priv_spec): New function used to set the default privilege spec. (md_parse_option): Call riscv_set_default_priv_spec rather than call riscv_get_priv_spec_class directly. (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by calling riscv_set_default_priv_spec. * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since the --with-priv-spec may be set to different privilege spec. * testsuite/gas/riscv/priv-reg.d: Likewise. * configure.ac: Add configure option --with-priv-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to explicit_attr. Set it to TRUE if any ELF attribute is found. (riscv_set_default_priv_spec): Try to set the default_priv_spec if the priv attributes are set. (md_assemble): Set the default_priv_spec according to the priv attributes when we start to assemble instruction. (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to riscv_write_out_attrs. Update the arch and priv attributes. If we don't set the corresponding ELF attributes, then try to output the default ones. (riscv_set_public_attributes): If any ELF attribute or -march-attr options is set (explicit_attr is TRUE), then call riscv_write_out_attrs to update the arch and priv attributes. (s_riscv_attribute): Make sure all arch and priv attributes are set before any instruction. * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any ELF attribute or -march-attr is set. If the priv attributes are not set, then try to update them by the default setting (-mpriv-spec or --with-priv-spec). * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * testsuite/gas/riscv/attribute-08.d: Likewise. * testsuite/gas/riscv/attribute-09.d: Likewise. * testsuite/gas/riscv/attribute-10.d: Likewise. * testsuite/gas/riscv/attribute-unknown.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec set by priv attributes must be supported. * testsuite/gas/riscv/attribute-05.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated priv attributes according to the -mpriv-spec option. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg.d: Removed. * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the CSR according to the priv spec 1.9. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the CSR according to the priv spec 1.9.1. * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the CSR according to the priv spec 1.10. * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the CSR according to the priv spec 1.11. * config/tc-riscv.c (md_show_usage): Add descriptions about the new GAS options. * doc/c-riscv.texi: Likewise. --- opcodes/po/opcodes.pot | 139 ++++++++++++++++++++++++++++++------------------- 1 file changed, 86 insertions(+), 53 deletions(-) (limited to 'opcodes/po') diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot index 62bcd32..8ff1e9c 100644 --- a/opcodes/po/opcodes.pot +++ b/opcodes/po/opcodes.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: bug-binutils@gnu.org\n" -"POT-Creation-Date: 2020-04-30 13:57+0100\n" +"POT-Creation-Date: 2020-05-20 15:53+0100\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -75,7 +75,7 @@ msgid "" msgstr "" #: aarch64-dis.c:3552 mips-dis.c:2778 mips-dis.c:2788 mips-dis.c:2791 -#: nfp-dis.c:2981 riscv-dis.c:556 +#: nfp-dis.c:2981 riscv-dis.c:616 #, c-format msgid "\n" msgstr "" @@ -663,7 +663,7 @@ msgstr "" #: bpf-asm.c:181 epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264 #: ip2k-asm.c:512 iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585 -#: m32r-asm.c:329 mep-asm.c:1288 mt-asm.c:596 or1k-asm.c:580 xc16x-asm.c:377 +#: m32r-asm.c:329 mep-asm.c:1288 mt-asm.c:596 or1k-asm.c:571 xc16x-asm.c:377 #: xstormy16-asm.c:277 #, c-format msgid "internal error: unrecognized field %d while parsing" @@ -671,7 +671,7 @@ msgstr "" #: bpf-asm.c:233 epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316 #: ip2k-asm.c:564 iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637 -#: m32r-asm.c:381 mep-asm.c:1340 mt-asm.c:648 or1k-asm.c:632 xc16x-asm.c:429 +#: m32r-asm.c:381 mep-asm.c:1340 mt-asm.c:648 or1k-asm.c:623 xc16x-asm.c:429 #: xstormy16-asm.c:329 msgid "missing mnemonic in syntax string" msgstr "" @@ -686,8 +686,8 @@ msgstr "" #: m32c-asm.c:1772 m32c-asm.c:1776 m32c-asm.c:1865 m32c-asm.c:1972 #: m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609 m32r-asm.c:716 mep-asm.c:1475 #: mep-asm.c:1479 mep-asm.c:1568 mep-asm.c:1675 mt-asm.c:783 mt-asm.c:787 -#: mt-asm.c:876 mt-asm.c:983 or1k-asm.c:767 or1k-asm.c:771 or1k-asm.c:860 -#: or1k-asm.c:967 xc16x-asm.c:564 xc16x-asm.c:568 xc16x-asm.c:657 +#: mt-asm.c:876 mt-asm.c:983 or1k-asm.c:758 or1k-asm.c:762 or1k-asm.c:851 +#: or1k-asm.c:958 xc16x-asm.c:564 xc16x-asm.c:568 xc16x-asm.c:657 #: xc16x-asm.c:764 xstormy16-asm.c:464 xstormy16-asm.c:468 xstormy16-asm.c:557 #: xstormy16-asm.c:664 msgid "unrecognized instruction" @@ -695,7 +695,7 @@ msgstr "" #: bpf-asm.c:415 epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498 #: ip2k-asm.c:746 iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819 -#: m32r-asm.c:563 mep-asm.c:1522 mt-asm.c:830 or1k-asm.c:814 xc16x-asm.c:611 +#: m32r-asm.c:563 mep-asm.c:1522 mt-asm.c:830 or1k-asm.c:805 xc16x-asm.c:611 #: xstormy16-asm.c:511 #, c-format msgid "syntax error (expected char `%c', found `%c')" @@ -703,7 +703,7 @@ msgstr "" #: bpf-asm.c:425 epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508 #: ip2k-asm.c:756 iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829 -#: m32r-asm.c:573 mep-asm.c:1532 mt-asm.c:840 or1k-asm.c:824 xc16x-asm.c:621 +#: m32r-asm.c:573 mep-asm.c:1532 mt-asm.c:840 or1k-asm.c:815 xc16x-asm.c:621 #: xstormy16-asm.c:521 #, c-format msgid "syntax error (expected char `%c', found end of instruction)" @@ -711,21 +711,21 @@ msgstr "" #: bpf-asm.c:455 epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538 #: ip2k-asm.c:786 iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859 -#: m32r-asm.c:603 mep-asm.c:1562 mt-asm.c:870 or1k-asm.c:854 xc16x-asm.c:651 +#: m32r-asm.c:603 mep-asm.c:1562 mt-asm.c:870 or1k-asm.c:845 xc16x-asm.c:651 #: xstormy16-asm.c:551 msgid "junk at end of line" msgstr "" #: bpf-asm.c:567 epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650 #: ip2k-asm.c:898 iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971 -#: m32r-asm.c:715 mep-asm.c:1674 mt-asm.c:982 or1k-asm.c:966 xc16x-asm.c:763 +#: m32r-asm.c:715 mep-asm.c:1674 mt-asm.c:982 or1k-asm.c:957 xc16x-asm.c:763 #: xstormy16-asm.c:663 msgid "unrecognized form of instruction" msgstr "" #: bpf-asm.c:581 epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664 #: ip2k-asm.c:912 iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985 -#: m32r-asm.c:729 mep-asm.c:1688 mt-asm.c:996 or1k-asm.c:980 xc16x-asm.c:777 +#: m32r-asm.c:729 mep-asm.c:1688 mt-asm.c:996 or1k-asm.c:971 xc16x-asm.c:777 #: xstormy16-asm.c:677 #, c-format msgid "bad instruction `%.50s...'" @@ -733,7 +733,7 @@ msgstr "" #: bpf-asm.c:584 epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667 #: ip2k-asm.c:915 iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988 -#: m32r-asm.c:732 mep-asm.c:1691 mt-asm.c:999 or1k-asm.c:983 xc16x-asm.c:780 +#: m32r-asm.c:732 mep-asm.c:1691 mt-asm.c:999 or1k-asm.c:974 xc16x-asm.c:780 #: xstormy16-asm.c:680 #, c-format msgid "bad instruction `%.50s'" @@ -766,7 +766,7 @@ msgstr "" #: bpf-dis.c:203 epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397 ip2k-dis.c:289 #: iq2000-dis.c:190 lm32-dis.c:148 m32c-dis.c:892 m32r-dis.c:280 mep-dis.c:1188 -#: mt-dis.c:291 or1k-dis.c:184 xc16x-dis.c:421 xstormy16-dis.c:169 +#: mt-dis.c:291 or1k-dis.c:175 xc16x-dis.c:421 xstormy16-dis.c:169 #, c-format msgid "internal error: unrecognized field %d while printing insn" msgstr "" @@ -797,7 +797,7 @@ msgstr "" #: bpf-ibld.c:628 epiphany-ibld.c:883 fr30-ibld.c:738 frv-ibld.c:864 #: ip2k-ibld.c:615 iq2000-ibld.c:721 lm32-ibld.c:642 m32c-ibld.c:1739 -#: m32r-ibld.c:673 mep-ibld.c:1216 mt-ibld.c:757 or1k-ibld.c:745 +#: m32r-ibld.c:673 mep-ibld.c:1216 mt-ibld.c:757 or1k-ibld.c:736 #: xc16x-ibld.c:760 xstormy16-ibld.c:686 #, c-format msgid "internal error: unrecognized field %d while building insn" @@ -805,7 +805,7 @@ msgstr "" #: bpf-ibld.c:712 epiphany-ibld.c:1178 fr30-ibld.c:944 frv-ibld.c:1182 #: ip2k-ibld.c:691 iq2000-ibld.c:897 lm32-ibld.c:747 m32c-ibld.c:2901 -#: m32r-ibld.c:811 mep-ibld.c:1816 mt-ibld.c:978 or1k-ibld.c:913 +#: m32r-ibld.c:811 mep-ibld.c:1816 mt-ibld.c:978 or1k-ibld.c:895 #: xc16x-ibld.c:981 xstormy16-ibld.c:833 #, c-format msgid "internal error: unrecognized field %d while decoding insn" @@ -813,7 +813,7 @@ msgstr "" #: bpf-ibld.c:781 epiphany-ibld.c:1322 fr30-ibld.c:1091 frv-ibld.c:1461 #: ip2k-ibld.c:766 iq2000-ibld.c:1029 lm32-ibld.c:837 m32c-ibld.c:3519 -#: m32r-ibld.c:925 mep-ibld.c:2287 mt-ibld.c:1179 or1k-ibld.c:1018 +#: m32r-ibld.c:925 mep-ibld.c:2287 mt-ibld.c:1179 or1k-ibld.c:991 #: xc16x-ibld.c:1203 xstormy16-ibld.c:944 #, c-format msgid "internal error: unrecognized field %d while getting int operand" @@ -821,7 +821,7 @@ msgstr "" #: bpf-ibld.c:832 epiphany-ibld.c:1448 fr30-ibld.c:1220 frv-ibld.c:1722 #: ip2k-ibld.c:823 iq2000-ibld.c:1143 lm32-ibld.c:909 m32c-ibld.c:4119 -#: m32r-ibld.c:1021 mep-ibld.c:2740 mt-ibld.c:1362 or1k-ibld.c:1105 +#: m32r-ibld.c:1021 mep-ibld.c:2740 mt-ibld.c:1362 or1k-ibld.c:1069 #: xc16x-ibld.c:1407 xstormy16-ibld.c:1037 #, c-format msgid "internal error: unrecognized field %d while getting vma operand" @@ -829,7 +829,7 @@ msgstr "" #: bpf-ibld.c:890 epiphany-ibld.c:1581 fr30-ibld.c:1352 frv-ibld.c:1990 #: ip2k-ibld.c:883 iq2000-ibld.c:1264 lm32-ibld.c:988 m32c-ibld.c:4707 -#: m32r-ibld.c:1123 mep-ibld.c:3154 mt-ibld.c:1552 or1k-ibld.c:1199 +#: m32r-ibld.c:1123 mep-ibld.c:3154 mt-ibld.c:1552 or1k-ibld.c:1154 #: xc16x-ibld.c:1612 xstormy16-ibld.c:1137 #, c-format msgid "internal error: unrecognized field %d while setting int operand" @@ -837,7 +837,7 @@ msgstr "" #: bpf-ibld.c:938 epiphany-ibld.c:1704 fr30-ibld.c:1474 frv-ibld.c:2248 #: ip2k-ibld.c:933 iq2000-ibld.c:1375 lm32-ibld.c:1057 m32c-ibld.c:5285 -#: m32r-ibld.c:1215 mep-ibld.c:3558 mt-ibld.c:1732 or1k-ibld.c:1283 +#: m32r-ibld.c:1215 mep-ibld.c:3558 mt-ibld.c:1732 or1k-ibld.c:1229 #: xc16x-ibld.c:1807 xstormy16-ibld.c:1227 #, c-format msgid "internal error: unrecognized field %d while setting vma operand" @@ -1881,29 +1881,29 @@ msgstr "" msgid "internal relocation type invalid" msgstr "" -#: or1k-desc.c:2213 +#: or1k-desc.c:2040 #, c-format msgid "" "internal error: or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize " "values: `%d' vs. `%d'" msgstr "" -#: or1k-desc.c:2296 +#: or1k-desc.c:2123 #, c-format msgid "internal error: or1k_cgen_cpu_open: unsupported argument `%d'" msgstr "" -#: or1k-desc.c:2315 +#: or1k-desc.c:2142 #, c-format msgid "internal error: or1k_cgen_cpu_open: no endianness specified" msgstr "" -#: ppc-dis.c:376 +#: ppc-dis.c:381 #, c-format msgid "warning: ignoring unknown -M%s option" msgstr "" -#: ppc-dis.c:965 +#: ppc-dis.c:972 #, c-format msgid "" "\n" @@ -1935,101 +1935,126 @@ msgstr "" msgid "attempt to set 'at' bits when using + or - modifier" msgstr "" -#: ppc-opc.c:658 +#: ppc-opc.c:677 msgid "invalid R operand" msgstr "" -#: ppc-opc.c:713 +#: ppc-opc.c:732 msgid "invalid mask field" msgstr "" -#: ppc-opc.c:736 +#: ppc-opc.c:755 msgid "invalid mfcr mask" msgstr "" -#: ppc-opc.c:812 +#: ppc-opc.c:873 ppc-opc.c:891 msgid "illegal L operand value" msgstr "" -#: ppc-opc.c:851 +#: ppc-opc.c:914 +msgid "illegal WC operand value" +msgstr "" + +#: ppc-opc.c:1011 msgid "incompatible L operand value" msgstr "" -#: ppc-opc.c:891 ppc-opc.c:926 +#: ppc-opc.c:1051 ppc-opc.c:1086 msgid "illegal bitmask" msgstr "" -#: ppc-opc.c:1013 +#: ppc-opc.c:1173 msgid "address register in load range" msgstr "" -#: ppc-opc.c:1079 +#: ppc-opc.c:1213 +msgid "illegal PL operand value" +msgstr "" + +#: ppc-opc.c:1274 msgid "index register in load range" msgstr "" -#: ppc-opc.c:1108 ppc-opc.c:1194 +#: ppc-opc.c:1303 ppc-opc.c:1389 msgid "source and target register operands must be different" msgstr "" -#: ppc-opc.c:1139 +#: ppc-opc.c:1334 msgid "invalid register operand when updating" msgstr "" -#: ppc-opc.c:1257 +#: ppc-opc.c:1452 msgid "illegal immediate value" msgstr "" -#: ppc-opc.c:1362 +#: ppc-opc.c:1557 msgid "invalid bat number" msgstr "" -#: ppc-opc.c:1397 +#: ppc-opc.c:1592 msgid "invalid sprg number" msgstr "" -#: ppc-opc.c:1434 +#: ppc-opc.c:1629 msgid "invalid tbr number" msgstr "" -#: ppc-opc.c:1581 +#: ppc-opc.c:1715 ppc-opc.c:1761 +msgid "VSR overlaps ACC operand" +msgstr "" + +#: ppc-opc.c:1868 msgid "invalid constant" msgstr "" -#: ppc-opc.c:1683 ppc-opc.c:1706 ppc-opc.c:1729 ppc-opc.c:1752 +#: ppc-opc.c:1970 ppc-opc.c:1993 ppc-opc.c:2016 ppc-opc.c:2039 msgid "UIMM = 00000 is illegal" msgstr "" -#: ppc-opc.c:1775 +#: ppc-opc.c:2062 msgid "UIMM values >7 are illegal" msgstr "" -#: ppc-opc.c:1798 +#: ppc-opc.c:2085 msgid "UIMM values >15 are illegal" msgstr "" -#: ppc-opc.c:1821 +#: ppc-opc.c:2108 msgid "GPR odd is illegal" msgstr "" -#: ppc-opc.c:1844 ppc-opc.c:1867 +#: ppc-opc.c:2131 ppc-opc.c:2154 msgid "invalid offset" msgstr "" -#: ppc-opc.c:1890 +#: ppc-opc.c:2177 msgid "invalid Ddd value" msgstr "" -#: riscv-dis.c:68 +#. The option without '=' should be defined above. +#: riscv-dis.c:84 riscv-dis.c:108 #, c-format msgid "unrecognized disassembler option: %s" msgstr "" -#: riscv-dis.c:346 +#. Invalid options with '=', no option name before '=', +#. and no value after '='. +#: riscv-dis.c:92 +#, c-format +msgid "unrecognized disassembler option with '=': %s" +msgstr "" + +#: riscv-dis.c:102 +#, c-format +msgid "unknown privilege spec set by %s=%s" +msgstr "" + +#: riscv-dis.c:402 #, c-format msgid "# internal error, undefined modifier (%c)" msgstr "" -#: riscv-dis.c:545 +#: riscv-dis.c:601 #, c-format msgid "" "\n" @@ -2037,19 +2062,27 @@ msgid "" "with the -M switch (multiple options should be separated by commas):\n" msgstr "" -#: riscv-dis.c:549 +#: riscv-dis.c:605 +#, c-format +msgid "" +"\n" +" numeric Print numeric register names, rather than ABI names.\n" +msgstr "" + +#: riscv-dis.c:608 #, c-format msgid "" "\n" -" numeric Print numeric register names, rather than ABI names.\n" +" no-aliases Disassemble only into canonical instructions, rather\n" +" than into pseudoinstructions.\n" msgstr "" -#: riscv-dis.c:552 +#: riscv-dis.c:612 #, c-format msgid "" "\n" -" no-aliases Disassemble only into canonical instructions, rather\n" -" than into pseudoinstructions.\n" +" priv-spec=PRIV Print the CSR according to the chosen privilege spec\n" +" (1.9, 1.9.1, 1.10, 1.11).\n" msgstr "" #: rx-dis.c:139 rx-dis.c:163 rx-dis.c:171 rx-dis.c:179 rx-dis.c:187 -- cgit v1.1