From abe9f67d45d38ee87b501da03a9b9778d31095fb Mon Sep 17 00:00:00 2001 From: Michael Eager Date: Wed, 21 Nov 2012 17:54:11 +0000 Subject: Add swap byte (swapb) and swap halfword (swaph) opcodes. binutils/opcodes * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES. * microblaze-opcm.h (microblaze_instr): Likewise binutils/gas/testsuite * gas/microblaze/allinsn.s: Add swapb, swaph * gas/microblaze/allinsn.d: Likewise --- opcodes/microblaze-opc.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'opcodes/microblaze-opc.h') diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h index 0447fc5..404985b 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -101,7 +101,7 @@ #define DELAY_SLOT 1 #define NO_DELAY_SLOT 0 -#define MAX_OPCODES 287 +#define MAX_OPCODES 289 struct op_code_struct { @@ -402,6 +402,8 @@ struct op_code_struct {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst }, {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst }, {"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */ + {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, + {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, {"", 0, 0, 0, 0, 0, 0, 0, 0}, }; -- cgit v1.1