From 551703cfd409faca433626a0af077a43011381b7 Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Mon, 24 Sep 2018 14:05:32 -0700 Subject: RISC-V: Allow pcrel_lo addends, error on addend overflow. bfd/ * elfnn-riscv.c (riscv_resolve_pcrel_lo_relocs): Add check for reloc overflow with addend. Use reloc_dangerous instead of reloc_overflow. Add strings for the two errors handled here. (riscv_elf_relocate_section) In case R_RISCV_PCREL_LO12_I, rewrite comment. Only give error with addend when used with section symbol. In case bfd_reloc_dangerous, update error string. ld/ * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run pcrel-lo-addend-2. * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.d: New. * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.s: New. * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend.d: Update name and error string. --- ld/ChangeLog | 8 ++++++++ ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 1 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d | 5 +++++ ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s | 16 ++++++++++++++++ ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d | 4 ++-- 5 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d create mode 100644 ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s (limited to 'ld') diff --git a/ld/ChangeLog b/ld/ChangeLog index 466c80a..9cdf22d 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,11 @@ +2018-09-24 Jim Wilson + + * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run pcrel-lo-addend-2. + * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.d: New. + * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.s: New. + * testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend.d: Update name + and error string. + 2018-09-21 Alan Modra * testsuite/ld-avr/gc-section-debugline.d: Update. diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp index c06b618..071f3a2 100644 --- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp @@ -23,6 +23,7 @@ if [istarget "riscv*-*-*"] { run_dump_test "c-lui" run_dump_test "disas-jalr" run_dump_test "pcrel-lo-addend" + run_dump_test "pcrel-lo-addend-2" run_ld_link_tests { { "Weak reference 32" "-T weakref.ld -melf32lriscv" "" "-march=rv32i -mabi=ilp32" {weakref32.s} diff --git a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d new file mode 100644 index 0000000..9e94c5c --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d @@ -0,0 +1,5 @@ +#name: %pcrel_lo overflow with an addend +#source: pcrel-lo-addend-2.s +#as: -march=rv32ic +#ld: -melf32lriscv +#error: .*dangerous relocation: %pcrel_lo overflow with an addend diff --git a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s new file mode 100644 index 0000000..b7f8212 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s @@ -0,0 +1,16 @@ + .text + .globl _start + .align 3 +_start: + nop + .LA0: auipc a5,%pcrel_hi(ll) + lw a0,%pcrel_lo(.LA0)(a5) + lw a0,%pcrel_lo(.LA0+4)(a5) + ret + .globl ll + .data + .align 3 + .zero 2024 +ll: + .word 0 + .word 0 diff --git a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d index bd61b4b..ad658be 100644 --- a/ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d +++ b/ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d @@ -1,5 +1,5 @@ -#name: %pcrel_lo with an addend +#name: %pcrel_lo section symbol with an addend #source: pcrel-lo-addend.s #as: -march=rv32ic #ld: -melf32lriscv -#error: .*dangerous relocation: %pcrel_lo with addend +#error: .*dangerous relocation: %pcrel_lo section symbol with an addend -- cgit v1.1