From 271bea6acd3759db96b33a30f110ee5e1f8146fc Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 9 Dec 2010 12:06:34 -0500 Subject: ld: tests: add -msim when testing bfin targets The Blackfin ELF compiler requires the user to explicitly select a CPU target else it will fail: bfin-elf-gcc: error: no processor type specified for linking Select the sim target for these tests since we should (hopefully) have access to the simulator. At least, it's more likely than having access to a real development board. This makes the pass/fail numbers increase by a lot: -# of expected passes 398 -# of unexpected failures 6 +# of expected passes 587 +# of unexpected failures 109 It looks like the vast majority of new failures are due to our omission of COPY relocations: /* Bfin does not currently have a COPY reloc. */ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) { _bfd_error_handler (_("the bfin target does not currently support the generation of copy relocations")); return FALSE; } There doesn't seem to be a way to easily disable tests that cause copy relocations though, lets just take the hit for now. * testsuite/config/default.exp [bfin*-elf*] (gcc_B_opt): Append -msim. --- ld/testsuite/config/default.exp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'ld/testsuite/config') diff --git a/ld/testsuite/config/default.exp b/ld/testsuite/config/default.exp index af313bb..4090f12 100644 --- a/ld/testsuite/config/default.exp +++ b/ld/testsuite/config/default.exp @@ -157,6 +157,11 @@ if { [istarget rx-*-*] } { set ASFLAGS "-muse-conventional-section-names" } +# Blackfin ELF targets require selection of an explicit CPU. Use the sim. +if {[istarget bfin*-elf*]} { + append gcc_B_opt " -msim" +} + # load the utility procedures load_lib ld-lib.exp -- cgit v1.1