From bd7ceb8d26e011ff3fd23402ec2587d7c374f090 Mon Sep 17 00:00:00 2001 From: Sudakshina Das Date: Thu, 11 Apr 2019 10:19:37 +0100 Subject: [BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions This patch updates the Store allocation tags instructions in Armv8.5-A Memory Tagging Extension. This is part of the changes that have been introduced recently in the 00bet10 release All of these instructions have an updated register operand (Xt -> ) - STG , [, #] - STG , [, #]! - STG , [], # - STZG , [, #] - STZG , [, #]! - STZG , [], # - ST2G , [, #] - ST2G , [, #]! - ST2G , [], # - STZ2G , [, #] - STZ2G , [, #]! - STZ2G , [], # In order to accept a new operand type Rt_SP is introduced which has the same field as FLD_Rt but follows other semantics of Rn_SP. *** gas/ChangeLog *** 2019-04-11 Sudakshina Das * config/tc-aarch64.c (process_omitted_operand): Add case for AARCH64_OPND_Rt_SP. (parse_operands): Likewise. * testsuite/gas/aarch64/armv8_5-a-memtag.d: Update tests. * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. * testsuite/gas/aarch64/illegal-memtag.l: Likewise. * testsuite/gas/aarch64/illegal-memtag.s: Likewise. *** include/ChangeLog *** 2019-04-11 Sudakshina Das * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP. *** opcodes/ChangeLog *** 2019-04-11 Sudakshina Das * aarch64-opc.c (aarch64_print_operand): Add case for AARCH64_OPND_Rt_SP. (verify_constraints): Likewise. * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier. (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions to accept Rt|SP as first operand. (AARCH64_OPERANDS): Add new Rt_SP. * aarch64-asm-2.c: Regenerated. * aarch64-dis-2.c: Regenerated. * aarch64-opc-2.c: Regenerated. --- include/ChangeLog | 4 ++++ include/opcode/aarch64.h | 1 + 2 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/ChangeLog b/include/ChangeLog index 4c1bedb..b0c92cf 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2019-04-11 Sudakshina Das + + * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP. + 2019-04-08 H.J. Lu * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 0c0234a..5dc5fb7 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -184,6 +184,7 @@ enum aarch64_opnd AARCH64_OPND_Rm, /* Integer register as source. */ AARCH64_OPND_Rt, /* Integer register used in ld/st instructions. */ AARCH64_OPND_Rt2, /* Integer register used in ld/st pair instructions. */ + AARCH64_OPND_Rt_SP, /* Integer Rt or SP used in STG instructions. */ AARCH64_OPND_Rs, /* Integer register used in ld/st exclusive. */ AARCH64_OPND_Ra, /* Integer register used in ddp_3src instructions. */ AARCH64_OPND_Rt_SYS, /* Integer register used in system instructions. */ -- cgit v1.1