From dc76d75756a47325f5233ff684b05d6c0846e86a Mon Sep 17 00:00:00 2001
From: Andrew Bennett <andrew.bennett@imgtec.com>
Date: Mon, 16 Dec 2013 16:39:47 +0000
Subject: Add support to show the symbolic names of the MIPS CP1 registers.

2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>

	gas/testsuite/gas/mips/
	* mips.exp: Add CP1 register name tests.
	* cp1-names-mips32.d: New test.
	* cp1-names-mips32r2.d: New test.
	* cp1-names-mips64.d: New test.
	* cp1-names-mips64r2.d: New test.
	* cp1-names-numeric.d: New test.
	* cp1-names-r3000.d: New test.
	* cp1-names-r4000.d: New test.
	* cp1-names-sb1.d: New test.
	* cp1-names.s: New test.
	* micromips-insn32.d: Add the correct symbolic names for the CP1
	registers.
	* micromips-noinsn32.d: Likewise.
	* micromips-trap.d: Likewise.
	* micromips.d: Likewise.

	opcodes/
	* mips-dis.c: Add mips_cp1_names pointer.
	(mips_cp1_names_numeric): New array.
	(mips_cp1_names_mips3264): New array.
	(mips_arch_choice): Add cp1_names.
	(mips_arch_choices): Add relevant cp1 register name array to each of
	the elements.
	(set_default_mips_dis_options): Add support for setting up the
	mips_cp1_names pointer.
	(parse_mips_dis_option): Add support for the cp1-names command line
	variable.  Also setup the mips_cp1_names pointer.
	(print_reg): Print out name of the cp1 register.
---
 gas/testsuite/ChangeLog                     | 18 +++++++
 gas/testsuite/gas/mips/cp1-names-mips32.d   | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-mips32r2.d | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-mips64.d   | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-mips64r2.d | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-numeric.d  | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-r3000.d    | 75 ++++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-r4000.d    | 75 ++++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names-sb1.d      | 74 +++++++++++++++++++++++++
 gas/testsuite/gas/mips/cp1-names.s          | 77 ++++++++++++++++++++++++++
 gas/testsuite/gas/mips/micromips-insn32.d   | 84 ++++++++++++++---------------
 gas/testsuite/gas/mips/micromips-noinsn32.d | 84 ++++++++++++++---------------
 gas/testsuite/gas/mips/micromips-trap.d     | 84 ++++++++++++++---------------
 gas/testsuite/gas/mips/micromips.d          | 84 ++++++++++++++---------------
 gas/testsuite/gas/mips/mips.exp             | 12 +++++
 15 files changed, 869 insertions(+), 168 deletions(-)
 create mode 100644 gas/testsuite/gas/mips/cp1-names-mips32.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-mips32r2.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-mips64.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-mips64r2.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-numeric.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-r3000.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-r4000.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names-sb1.d
 create mode 100644 gas/testsuite/gas/mips/cp1-names.s

(limited to 'gas')

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2c51853..be61299 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,23 @@
 2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>
 
+	* gas/mips/mips.exp: Add CP1 register name tests.
+	* gas/mips/cp1-names-mips32.d: New test.
+	* gas/mips/cp1-names-mips32r2.d: New test.
+	* gas/mips/cp1-names-mips64.d: New test.
+	* gas/mips/cp1-names-mips64r2.d: New test.
+	* gas/mips/cp1-names-numeric.d: New test.
+	* gas/mips/cp1-names-r3000.d: New test.
+	* gas/mips/cp1-names-r4000.d: New test.
+	* gas/mips/cp1-names-sb1.d: New test.
+	* gas/mips/cp1-names.s: New test.
+	* gas/mips/micromips-insn32.d: Add the correct symbolic names for the CP1
+	registers.
+	* gas/mips/micromips-noinsn32.d: Likewise.
+	* gas/mips/micromips-trap.d: Likewise.
+	* gas/mips/micromips.d: Likewise.
+
+2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>
+
 	* gas/mips/msa.s: Reduced maximum element index range
 	for sldi, splati, copy_s, copy_u, insert and insve instructions.
 	* gas/mips/msa64.s: Likewise.
diff --git a/gas/testsuite/gas/mips/cp1-names-mips32.d b/gas/testsuite/gas/mips/cp1-names-mips32.d
new file mode 100644
index 0000000..93d3253
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-mips32.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips32
+#name: MIPS CP1 register disassembly (mips32)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,c1_fir
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,c1_ufr
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,c1_unfr
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,c1_fccr
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,c1_fexr
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,c1_fenr
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,c1_fcsr
+0+0080 <[^>]*> 44400000 	cfc1	\$0,c1_fir
+0+0084 <[^>]*> 44400800 	cfc1	\$0,c1_ufr
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,c1_unfr
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,c1_fccr
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,c1_fexr
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,c1_fenr
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,c1_fcsr
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-mips32r2.d b/gas/testsuite/gas/mips/cp1-names-mips32r2.d
new file mode 100644
index 0000000..03d6a19
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-mips32r2.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips32r2
+#name: MIPS CP1 register disassembly (mips32r2)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,c1_fir
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,c1_ufr
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,c1_unfr
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,c1_fccr
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,c1_fexr
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,c1_fenr
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,c1_fcsr
+0+0080 <[^>]*> 44400000 	cfc1	\$0,c1_fir
+0+0084 <[^>]*> 44400800 	cfc1	\$0,c1_ufr
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,c1_unfr
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,c1_fccr
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,c1_fexr
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,c1_fenr
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,c1_fcsr
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-mips64.d b/gas/testsuite/gas/mips/cp1-names-mips64.d
new file mode 100644
index 0000000..a7afaf1
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-mips64.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips64
+#name: MIPS CP1 register disassembly (mips64)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,c1_fir
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,c1_ufr
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,c1_unfr
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,c1_fccr
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,c1_fexr
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,c1_fenr
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,c1_fcsr
+0+0080 <[^>]*> 44400000 	cfc1	\$0,c1_fir
+0+0084 <[^>]*> 44400800 	cfc1	\$0,c1_ufr
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,c1_unfr
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,c1_fccr
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,c1_fexr
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,c1_fenr
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,c1_fcsr
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-mips64r2.d b/gas/testsuite/gas/mips/cp1-names-mips64r2.d
new file mode 100644
index 0000000..45bc9d1
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-mips64r2.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips64r2
+#name: MIPS CP1 register disassembly (mips64r2)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,c1_fir
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,c1_ufr
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,c1_unfr
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,c1_fccr
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,c1_fexr
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,c1_fenr
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,c1_fcsr
+0+0080 <[^>]*> 44400000 	cfc1	\$0,c1_fir
+0+0084 <[^>]*> 44400800 	cfc1	\$0,c1_ufr
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,c1_unfr
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,c1_fccr
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,c1_fexr
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,c1_fenr
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,c1_fcsr
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-numeric.d b/gas/testsuite/gas/mips/cp1-names-numeric.d
new file mode 100644
index 0000000..e0ab337
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-numeric.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=numeric
+#name: MIPS CP1 register disassembly (numeric)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,\$0
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,\$1
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,\$4
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,\$25
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,\$26
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,\$28
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,\$31
+0+0080 <[^>]*> 44400000 	cfc1	\$0,\$0
+0+0084 <[^>]*> 44400800 	cfc1	\$0,\$1
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,\$4
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,\$25
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,\$26
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,\$28
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-r3000.d b/gas/testsuite/gas/mips/cp1-names-r3000.d
new file mode 100644
index 0000000..25b5bfb
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-r3000.d
@@ -0,0 +1,75 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=r3000
+#name: MIPS CP1 register disassembly (r3000)
+#as: -32 -march=r3000
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,\$0
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,\$1
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,\$4
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,\$25
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,\$26
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,\$28
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,\$31
+0+0080 <[^>]*> 44400000 	cfc1	\$0,\$0
+0+0084 <[^>]*> 44400800 	cfc1	\$0,\$1
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,\$4
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,\$25
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,\$26
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,\$28
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-r4000.d b/gas/testsuite/gas/mips/cp1-names-r4000.d
new file mode 100644
index 0000000..a1030a2
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-r4000.d
@@ -0,0 +1,75 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
+#name: MIPS CP1 register disassembly
+#as: -32 -march=r4000
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,\$0
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,\$1
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,\$4
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,\$25
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,\$26
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,\$28
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,\$31
+0+0080 <[^>]*> 44400000 	cfc1	\$0,\$0
+0+0084 <[^>]*> 44400800 	cfc1	\$0,\$1
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,\$4
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,\$25
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,\$26
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,\$28
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,\$31
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names-sb1.d b/gas/testsuite/gas/mips/cp1-names-sb1.d
new file mode 100644
index 0000000..dc4407d
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names-sb1.d
@@ -0,0 +1,74 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=sb1
+#name: MIPS CP1 register disassembly (sb1)
+#source: cp1-names.s
+
+# Check objdump's handling of -M cp1-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44c00000 	ctc1	\$0,c1_fir
+0+0004 <[^>]*> 44c00800 	ctc1	\$0,c1_ufr
+0+0008 <[^>]*> 44c01000 	ctc1	\$0,\$2
+0+000c <[^>]*> 44c01800 	ctc1	\$0,\$3
+0+0010 <[^>]*> 44c02000 	ctc1	\$0,c1_unfr
+0+0014 <[^>]*> 44c02800 	ctc1	\$0,\$5
+0+0018 <[^>]*> 44c03000 	ctc1	\$0,\$6
+0+001c <[^>]*> 44c03800 	ctc1	\$0,\$7
+0+0020 <[^>]*> 44c04000 	ctc1	\$0,\$8
+0+0024 <[^>]*> 44c04800 	ctc1	\$0,\$9
+0+0028 <[^>]*> 44c05000 	ctc1	\$0,\$10
+0+002c <[^>]*> 44c05800 	ctc1	\$0,\$11
+0+0030 <[^>]*> 44c06000 	ctc1	\$0,\$12
+0+0034 <[^>]*> 44c06800 	ctc1	\$0,\$13
+0+0038 <[^>]*> 44c07000 	ctc1	\$0,\$14
+0+003c <[^>]*> 44c07800 	ctc1	\$0,\$15
+0+0040 <[^>]*> 44c08000 	ctc1	\$0,\$16
+0+0044 <[^>]*> 44c08800 	ctc1	\$0,\$17
+0+0048 <[^>]*> 44c09000 	ctc1	\$0,\$18
+0+004c <[^>]*> 44c09800 	ctc1	\$0,\$19
+0+0050 <[^>]*> 44c0a000 	ctc1	\$0,\$20
+0+0054 <[^>]*> 44c0a800 	ctc1	\$0,\$21
+0+0058 <[^>]*> 44c0b000 	ctc1	\$0,\$22
+0+005c <[^>]*> 44c0b800 	ctc1	\$0,\$23
+0+0060 <[^>]*> 44c0c000 	ctc1	\$0,\$24
+0+0064 <[^>]*> 44c0c800 	ctc1	\$0,c1_fccr
+0+0068 <[^>]*> 44c0d000 	ctc1	\$0,c1_fexr
+0+006c <[^>]*> 44c0d800 	ctc1	\$0,\$27
+0+0070 <[^>]*> 44c0e000 	ctc1	\$0,c1_fenr
+0+0074 <[^>]*> 44c0e800 	ctc1	\$0,\$29
+0+0078 <[^>]*> 44c0f000 	ctc1	\$0,\$30
+0+007c <[^>]*> 44c0f800 	ctc1	\$0,c1_fcsr
+0+0080 <[^>]*> 44400000 	cfc1	\$0,c1_fir
+0+0084 <[^>]*> 44400800 	cfc1	\$0,c1_ufr
+0+0088 <[^>]*> 44401000 	cfc1	\$0,\$2
+0+008c <[^>]*> 44401800 	cfc1	\$0,\$3
+0+0090 <[^>]*> 44402000 	cfc1	\$0,c1_unfr
+0+0094 <[^>]*> 44402800 	cfc1	\$0,\$5
+0+0098 <[^>]*> 44403000 	cfc1	\$0,\$6
+0+009c <[^>]*> 44403800 	cfc1	\$0,\$7
+0+00a0 <[^>]*> 44404000 	cfc1	\$0,\$8
+0+00a4 <[^>]*> 44404800 	cfc1	\$0,\$9
+0+00a8 <[^>]*> 44405000 	cfc1	\$0,\$10
+0+00ac <[^>]*> 44405800 	cfc1	\$0,\$11
+0+00b0 <[^>]*> 44406000 	cfc1	\$0,\$12
+0+00b4 <[^>]*> 44406800 	cfc1	\$0,\$13
+0+00b8 <[^>]*> 44407000 	cfc1	\$0,\$14
+0+00bc <[^>]*> 44407800 	cfc1	\$0,\$15
+0+00c0 <[^>]*> 44408000 	cfc1	\$0,\$16
+0+00c4 <[^>]*> 44408800 	cfc1	\$0,\$17
+0+00c8 <[^>]*> 44409000 	cfc1	\$0,\$18
+0+00cc <[^>]*> 44409800 	cfc1	\$0,\$19
+0+00d0 <[^>]*> 4440a000 	cfc1	\$0,\$20
+0+00d4 <[^>]*> 4440a800 	cfc1	\$0,\$21
+0+00d8 <[^>]*> 4440b000 	cfc1	\$0,\$22
+0+00dc <[^>]*> 4440b800 	cfc1	\$0,\$23
+0+00e0 <[^>]*> 4440c000 	cfc1	\$0,\$24
+0+00e4 <[^>]*> 4440c800 	cfc1	\$0,c1_fccr
+0+00e8 <[^>]*> 4440d000 	cfc1	\$0,c1_fexr
+0+00ec <[^>]*> 4440d800 	cfc1	\$0,\$27
+0+00f0 <[^>]*> 4440e000 	cfc1	\$0,c1_fenr
+0+00f4 <[^>]*> 4440e800 	cfc1	\$0,\$29
+0+00f8 <[^>]*> 4440f000 	cfc1	\$0,\$30
+0+00fc <[^>]*> 4440f800 	cfc1	\$0,c1_fcsr
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/cp1-names.s b/gas/testsuite/gas/mips/cp1-names.s
new file mode 100644
index 0000000..7572354
--- /dev/null
+++ b/gas/testsuite/gas/mips/cp1-names.s
@@ -0,0 +1,77 @@
+# source file to test objdump's disassembly using various styles of
+# CP1 register names.
+
+	.set noreorder
+	.set noat
+
+	.globl text_label .text
+text_label:
+
+	ctc1	$0, $0
+	ctc1	$0, $1
+	ctc1	$0, $2
+	ctc1	$0, $3
+	ctc1	$0, $4
+	ctc1	$0, $5
+	ctc1	$0, $6
+	ctc1	$0, $7
+	ctc1	$0, $8
+	ctc1	$0, $9
+	ctc1	$0, $10
+	ctc1	$0, $11
+	ctc1	$0, $12
+	ctc1	$0, $13
+	ctc1	$0, $14
+	ctc1	$0, $15
+	ctc1	$0, $16
+	ctc1	$0, $17
+	ctc1	$0, $18
+	ctc1	$0, $19
+	ctc1	$0, $20
+	ctc1	$0, $21
+	ctc1	$0, $22
+	ctc1	$0, $23
+	ctc1	$0, $24
+	ctc1	$0, $25
+	ctc1	$0, $26
+	ctc1	$0, $27
+	ctc1	$0, $28
+	ctc1	$0, $29
+	ctc1	$0, $30
+	ctc1	$0, $31
+
+	cfc1	$0, $0
+	cfc1	$0, $1
+	cfc1	$0, $2
+	cfc1	$0, $3
+	cfc1	$0, $4
+	cfc1	$0, $5
+	cfc1	$0, $6
+	cfc1	$0, $7
+	cfc1	$0, $8
+	cfc1	$0, $9
+	cfc1	$0, $10
+	cfc1	$0, $11
+	cfc1	$0, $12
+	cfc1	$0, $13
+	cfc1	$0, $14
+	cfc1	$0, $15
+	cfc1	$0, $16
+	cfc1	$0, $17
+	cfc1	$0, $18
+	cfc1	$0, $19
+	cfc1	$0, $20
+	cfc1	$0, $21
+	cfc1	$0, $22
+	cfc1	$0, $23
+	cfc1	$0, $24
+	cfc1	$0, $25
+	cfc1	$0, $26
+	cfc1	$0, $27
+	cfc1	$0, $28
+	cfc1	$0, $29
+	cfc1	$0, $30
+	cfc1	$0, $31
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+      .space  8
diff --git a/gas/testsuite/gas/mips/micromips-insn32.d b/gas/testsuite/gas/mips/micromips-insn32.d
index a28c519..c0ff2db 100644
--- a/gas/testsuite/gas/mips/micromips-insn32.d
+++ b/gas/testsuite/gas/mips/micromips-insn32.d
@@ -5412,11 +5412,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	5401 1b3b 	ceil\.w\.s	\$f0,\$f1
 [ 0-9a-f]+:	57df 1b3b 	ceil\.w\.s	\$f30,\$f31
 [ 0-9a-f]+:	5442 1b3b 	ceil\.w\.s	\$f2,\$f2
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5437,18 +5437,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5469,13 +5469,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 cd3c 	cfc2	a1,\$0
 [ 0-9a-f]+:	00a1 cd3c 	cfc2	a1,\$1
 [ 0-9a-f]+:	00a2 cd3c 	cfc2	a1,\$2
@@ -5508,11 +5508,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	00bd cd3c 	cfc2	a1,\$29
 [ 0-9a-f]+:	00be cd3c 	cfc2	a1,\$30
 [ 0-9a-f]+:	00bf cd3c 	cfc2	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5533,18 +5533,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5565,13 +5565,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 dd3c 	ctc2	a1,\$0
 [ 0-9a-f]+:	00a1 dd3c 	ctc2	a1,\$1
 [ 0-9a-f]+:	00a2 dd3c 	ctc2	a1,\$2
@@ -6787,11 +6787,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54bd 243b 	dmfc1	a1,\$f29
 [ 0-9a-f]+:	54be 243b 	dmfc1	a1,\$f30
 [ 0-9a-f]+:	54bf 243b 	dmfc1	a1,\$f31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6812,18 +6812,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6844,13 +6844,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
 [ 0-9a-f]+:	0040 6d3c 	dmfc2	v0,\$0
 [ 0-9a-f]+:	0041 6d3c 	dmfc2	v0,\$1
 [ 0-9a-f]+:	0042 6d3c 	dmfc2	v0,\$2
diff --git a/gas/testsuite/gas/mips/micromips-noinsn32.d b/gas/testsuite/gas/mips/micromips-noinsn32.d
index 520c9cb..5bbaab1 100644
--- a/gas/testsuite/gas/mips/micromips-noinsn32.d
+++ b/gas/testsuite/gas/mips/micromips-noinsn32.d
@@ -5391,11 +5391,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	5401 1b3b 	ceil\.w\.s	\$f0,\$f1
 [ 0-9a-f]+:	57df 1b3b 	ceil\.w\.s	\$f30,\$f31
 [ 0-9a-f]+:	5442 1b3b 	ceil\.w\.s	\$f2,\$f2
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5416,18 +5416,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5448,13 +5448,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 cd3c 	cfc2	a1,\$0
 [ 0-9a-f]+:	00a1 cd3c 	cfc2	a1,\$1
 [ 0-9a-f]+:	00a2 cd3c 	cfc2	a1,\$2
@@ -5487,11 +5487,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	00bd cd3c 	cfc2	a1,\$29
 [ 0-9a-f]+:	00be cd3c 	cfc2	a1,\$30
 [ 0-9a-f]+:	00bf cd3c 	cfc2	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5512,18 +5512,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5544,13 +5544,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 dd3c 	ctc2	a1,\$0
 [ 0-9a-f]+:	00a1 dd3c 	ctc2	a1,\$1
 [ 0-9a-f]+:	00a2 dd3c 	ctc2	a1,\$2
@@ -6766,11 +6766,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54bd 243b 	dmfc1	a1,\$f29
 [ 0-9a-f]+:	54be 243b 	dmfc1	a1,\$f30
 [ 0-9a-f]+:	54bf 243b 	dmfc1	a1,\$f31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6791,18 +6791,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6823,13 +6823,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
 [ 0-9a-f]+:	0040 6d3c 	dmfc2	v0,\$0
 [ 0-9a-f]+:	0041 6d3c 	dmfc2	v0,\$1
 [ 0-9a-f]+:	0042 6d3c 	dmfc2	v0,\$2
diff --git a/gas/testsuite/gas/mips/micromips-trap.d b/gas/testsuite/gas/mips/micromips-trap.d
index f1167a0..cfb0979 100644
--- a/gas/testsuite/gas/mips/micromips-trap.d
+++ b/gas/testsuite/gas/mips/micromips-trap.d
@@ -5397,11 +5397,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	5401 1b3b 	ceil\.w\.s	\$f0,\$f1
 [ 0-9a-f]+:	57df 1b3b 	ceil\.w\.s	\$f30,\$f31
 [ 0-9a-f]+:	5442 1b3b 	ceil\.w\.s	\$f2,\$f2
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5422,18 +5422,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5454,13 +5454,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 cd3c 	cfc2	a1,\$0
 [ 0-9a-f]+:	00a1 cd3c 	cfc2	a1,\$1
 [ 0-9a-f]+:	00a2 cd3c 	cfc2	a1,\$2
@@ -5493,11 +5493,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	00bd cd3c 	cfc2	a1,\$29
 [ 0-9a-f]+:	00be cd3c 	cfc2	a1,\$30
 [ 0-9a-f]+:	00bf cd3c 	cfc2	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5518,18 +5518,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5550,13 +5550,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 dd3c 	ctc2	a1,\$0
 [ 0-9a-f]+:	00a1 dd3c 	ctc2	a1,\$1
 [ 0-9a-f]+:	00a2 dd3c 	ctc2	a1,\$2
@@ -6757,11 +6757,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54bd 243b 	dmfc1	a1,\$f29
 [ 0-9a-f]+:	54be 243b 	dmfc1	a1,\$f30
 [ 0-9a-f]+:	54bf 243b 	dmfc1	a1,\$f31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6782,18 +6782,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6814,13 +6814,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
 [ 0-9a-f]+:	0040 6d3c 	dmfc2	v0,\$0
 [ 0-9a-f]+:	0041 6d3c 	dmfc2	v0,\$1
 [ 0-9a-f]+:	0042 6d3c 	dmfc2	v0,\$2
diff --git a/gas/testsuite/gas/mips/micromips.d b/gas/testsuite/gas/mips/micromips.d
index 4821d09..e262663 100644
--- a/gas/testsuite/gas/mips/micromips.d
+++ b/gas/testsuite/gas/mips/micromips.d
@@ -5469,11 +5469,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	5401 1b3b 	ceil\.w\.s	\$f0,\$f1
 [ 0-9a-f]+:	57df 1b3b 	ceil\.w\.s	\$f30,\$f31
 [ 0-9a-f]+:	5442 1b3b 	ceil\.w\.s	\$f2,\$f2
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5494,18 +5494,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
-[ 0-9a-f]+:	54a0 103b 	cfc1	a1,\$0
-[ 0-9a-f]+:	54a1 103b 	cfc1	a1,\$1
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 103b 	cfc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 103b 	cfc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 103b 	cfc1	a1,\$2
 [ 0-9a-f]+:	54a3 103b 	cfc1	a1,\$3
-[ 0-9a-f]+:	54a4 103b 	cfc1	a1,\$4
+[ 0-9a-f]+:	54a4 103b 	cfc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 103b 	cfc1	a1,\$5
 [ 0-9a-f]+:	54a6 103b 	cfc1	a1,\$6
 [ 0-9a-f]+:	54a7 103b 	cfc1	a1,\$7
@@ -5526,13 +5526,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 103b 	cfc1	a1,\$22
 [ 0-9a-f]+:	54b7 103b 	cfc1	a1,\$23
 [ 0-9a-f]+:	54b8 103b 	cfc1	a1,\$24
-[ 0-9a-f]+:	54b9 103b 	cfc1	a1,\$25
-[ 0-9a-f]+:	54ba 103b 	cfc1	a1,\$26
+[ 0-9a-f]+:	54b9 103b 	cfc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 103b 	cfc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 103b 	cfc1	a1,\$27
-[ 0-9a-f]+:	54bc 103b 	cfc1	a1,\$28
+[ 0-9a-f]+:	54bc 103b 	cfc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 103b 	cfc1	a1,\$29
 [ 0-9a-f]+:	54be 103b 	cfc1	a1,\$30
-[ 0-9a-f]+:	54bf 103b 	cfc1	a1,\$31
+[ 0-9a-f]+:	54bf 103b 	cfc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 cd3c 	cfc2	a1,\$0
 [ 0-9a-f]+:	00a1 cd3c 	cfc2	a1,\$1
 [ 0-9a-f]+:	00a2 cd3c 	cfc2	a1,\$2
@@ -5565,11 +5565,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	00bd cd3c 	cfc2	a1,\$29
 [ 0-9a-f]+:	00be cd3c 	cfc2	a1,\$30
 [ 0-9a-f]+:	00bf cd3c 	cfc2	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5590,18 +5590,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
-[ 0-9a-f]+:	54a0 183b 	ctc1	a1,\$0
-[ 0-9a-f]+:	54a1 183b 	ctc1	a1,\$1
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 183b 	ctc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 183b 	ctc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 183b 	ctc1	a1,\$2
 [ 0-9a-f]+:	54a3 183b 	ctc1	a1,\$3
-[ 0-9a-f]+:	54a4 183b 	ctc1	a1,\$4
+[ 0-9a-f]+:	54a4 183b 	ctc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 183b 	ctc1	a1,\$5
 [ 0-9a-f]+:	54a6 183b 	ctc1	a1,\$6
 [ 0-9a-f]+:	54a7 183b 	ctc1	a1,\$7
@@ -5622,13 +5622,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 183b 	ctc1	a1,\$22
 [ 0-9a-f]+:	54b7 183b 	ctc1	a1,\$23
 [ 0-9a-f]+:	54b8 183b 	ctc1	a1,\$24
-[ 0-9a-f]+:	54b9 183b 	ctc1	a1,\$25
-[ 0-9a-f]+:	54ba 183b 	ctc1	a1,\$26
+[ 0-9a-f]+:	54b9 183b 	ctc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 183b 	ctc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 183b 	ctc1	a1,\$27
-[ 0-9a-f]+:	54bc 183b 	ctc1	a1,\$28
+[ 0-9a-f]+:	54bc 183b 	ctc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 183b 	ctc1	a1,\$29
 [ 0-9a-f]+:	54be 183b 	ctc1	a1,\$30
-[ 0-9a-f]+:	54bf 183b 	ctc1	a1,\$31
+[ 0-9a-f]+:	54bf 183b 	ctc1	a1,c1_fcsr
 [ 0-9a-f]+:	00a0 dd3c 	ctc2	a1,\$0
 [ 0-9a-f]+:	00a1 dd3c 	ctc2	a1,\$1
 [ 0-9a-f]+:	00a2 dd3c 	ctc2	a1,\$2
@@ -6844,11 +6844,11 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54bd 243b 	dmfc1	a1,\$f29
 [ 0-9a-f]+:	54be 243b 	dmfc1	a1,\$f30
 [ 0-9a-f]+:	54bf 243b 	dmfc1	a1,\$f31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6869,18 +6869,18 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
-[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,\$0
-[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,\$1
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
+[ 0-9a-f]+:	54a0 2c3b 	dmtc1	a1,c1_fir
+[ 0-9a-f]+:	54a1 2c3b 	dmtc1	a1,c1_ufr
 [ 0-9a-f]+:	54a2 2c3b 	dmtc1	a1,\$2
 [ 0-9a-f]+:	54a3 2c3b 	dmtc1	a1,\$3
-[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,\$4
+[ 0-9a-f]+:	54a4 2c3b 	dmtc1	a1,c1_unfr
 [ 0-9a-f]+:	54a5 2c3b 	dmtc1	a1,\$5
 [ 0-9a-f]+:	54a6 2c3b 	dmtc1	a1,\$6
 [ 0-9a-f]+:	54a7 2c3b 	dmtc1	a1,\$7
@@ -6901,13 +6901,13 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	54b6 2c3b 	dmtc1	a1,\$22
 [ 0-9a-f]+:	54b7 2c3b 	dmtc1	a1,\$23
 [ 0-9a-f]+:	54b8 2c3b 	dmtc1	a1,\$24
-[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,\$25
-[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,\$26
+[ 0-9a-f]+:	54b9 2c3b 	dmtc1	a1,c1_fccr
+[ 0-9a-f]+:	54ba 2c3b 	dmtc1	a1,c1_fexr
 [ 0-9a-f]+:	54bb 2c3b 	dmtc1	a1,\$27
-[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,\$28
+[ 0-9a-f]+:	54bc 2c3b 	dmtc1	a1,c1_fenr
 [ 0-9a-f]+:	54bd 2c3b 	dmtc1	a1,\$29
 [ 0-9a-f]+:	54be 2c3b 	dmtc1	a1,\$30
-[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,\$31
+[ 0-9a-f]+:	54bf 2c3b 	dmtc1	a1,c1_fcsr
 [ 0-9a-f]+:	0040 6d3c 	dmfc2	v0,\$0
 [ 0-9a-f]+:	0041 6d3c 	dmfc2	v0,\$1
 [ 0-9a-f]+:	0042 6d3c 	dmfc2	v0,\$2
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index dfc92d9..ece3a13 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -971,6 +971,18 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "cp0sel-names-mips64r2"
     run_dump_test "cp0sel-names-sb1"
 
+    run_dump_test "cp1-names-numeric"
+    run_dump_test "cp1-names-r3000"
+    run_dump_test "cp1-names-r4000" \
+		  { { {name} {(r4000)} } { {objdump} {-M cp0-names=r4000} } }
+    run_dump_test "cp1-names-r4000" \
+		  { { {name} {(r4400)} } { {objdump} {-M cp0-names=r4400} } }
+    run_dump_test "cp1-names-mips32"
+    run_dump_test "cp1-names-mips32r2"
+    run_dump_test "cp1-names-mips64"
+    run_dump_test "cp1-names-mips64r2"
+    run_dump_test "cp1-names-sb1"
+
     run_dump_test "hwr-names-numeric"
     run_dump_test "hwr-names-mips32r2"
     run_dump_test "hwr-names-mips64r2"
-- 
cgit v1.1