From 7149607f6ae572fa198116b0d0fb69a3e0fde458 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sat, 12 Nov 2022 10:40:13 +1030 Subject: PowerPC64 paddi -Mraw On a testcase like pla 8,foo@pcrel disassembled with -Mpower10 results in 0: 00 00 10 06 pla r8,0 # 0 4: 00 00 00 39 0: R_PPC64_PCREL34 foo but with -Mpower10 -Mraw 0: 00 00 10 06 .long 0x6100000 0: R_PPC64_PCREL34 foo 4: 00 00 00 39 addi r8,0,0 The instruction is unrecognised due to the hack we have in extract_pcrel0 in order to disassemble paddi with RA0=0 and R=1 as pla. I could have just added "&& !(dialect & PPC_OPCODE_RAW)" to the condition in extract_pcrel0 under which *invalid is set, but went for this larger patch that reorders the extended insn pla to the more usual place before its underlying machine insn. (la is after addi because we never disassemble to la.) gas/ * testsuite/gas/ppc/raw.d, * testsuite/gas/ppc/raw.s: Add pla. opcodes/ * ppc-opc.c (extract_pcrel1): Rename from extract_pcrel0 and invert *invalid logic. (PCREL1): Rename from PCREL0. (prefix_opcodes): Sort pla before paddi, adjusting R operand for pla, paddi and psubi. --- gas/testsuite/gas/ppc/raw.d | 2 ++ gas/testsuite/gas/ppc/raw.s | 1 + 2 files changed, 3 insertions(+) (limited to 'gas') diff --git a/gas/testsuite/gas/ppc/raw.d b/gas/testsuite/gas/ppc/raw.d index 133c8c4..a9cfa8b 100644 --- a/gas/testsuite/gas/ppc/raw.d +++ b/gas/testsuite/gas/ppc/raw.d @@ -60,3 +60,5 @@ Disassembly of section \.text: c8: (7c 20 04 ac|ac 04 20 7c) sync 1,0 cc: (06 00 00 00|00 00 00 06) paddi r3,0,0,0 d0: (38 60 00 00|00 00 60 38) + d4: (06 10 00 00|00 00 10 06) paddi r3,0,0,1 # d4 + d8: (38 60 00 00|00 00 60 38) diff --git a/gas/testsuite/gas/ppc/raw.s b/gas/testsuite/gas/ppc/raw.s index 874f0bc..09e145c 100644 --- a/gas/testsuite/gas/ppc/raw.s +++ b/gas/testsuite/gas/ppc/raw.s @@ -50,3 +50,4 @@ mdoom lwsync pli 3,0 + pla 3,0 -- cgit v1.1