From c9ae58fe32e88914b67988d5bfde184f79c7070f Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sat, 4 Jan 2020 08:11:43 +1030 Subject: ubsan: m32r: left shift of negative value cpu/ * m32r.cpu (f-disp8): Avoid left shift of negative values. (f-disp16, f-disp24): Likewise. opcodes/ * m32r-ibld.c: Regenerate. --- cpu/m32r.cpu | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'cpu/m32r.cpu') diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu index 003c848..a239525 100644 --- a/cpu/m32r.cpu +++ b/cpu/m32r.cpu @@ -478,13 +478,13 @@ (dnf f-hi16 "high 16 bits" (SIGN-OPT) 16 16) (df f-disp8 "disp8, slot unknown" (PCREL-ADDR RELOC) 8 8 INT ((value pc) (sra WI (sub WI value (and WI pc (const -4))) (const 2))) - ((value pc) (add WI (sll WI value (const 2)) (and WI pc (const -4))))) + ((value pc) (add WI (mul WI value (const 4)) (and WI pc (const -4))))) (df f-disp16 "disp16" (PCREL-ADDR RELOC) 16 16 INT ((value pc) (sra WI (sub WI value pc) (const 2))) - ((value pc) (add WI (sll WI value (const 2)) pc))) + ((value pc) (add WI (mul WI value (const 4)) pc))) (df f-disp24 "disp24" (PCREL-ADDR RELOC) 8 24 INT ((value pc) (sra WI (sub WI value pc) (const 2))) - ((value pc) (add WI (sll WI value (const 2)) pc))) + ((value pc) (add WI (mul WI value (const 4)) pc))) (dnf f-op23 "op2.3" () 9 3) (dnf f-op3 "op3" () 14 2) -- cgit v1.1