From cc6aa1a6e0a8f2b3eda496aef0b3579a8c2b5951 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sat, 4 Jan 2020 19:53:19 +1030 Subject: ubsan: m32c: left shift of negative value There are probably a lot more of these still here. cpu/ * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign bits before shifting rather than masking after shifting. (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise. (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise. (f-dsp-64-u16, f-dsp-8-s24): Likewise. (f-bitbase32-16-s19-unprefixed): Avoid signed left shift. opcodes/ * m32c-ibld.c: Regenerate. --- cpu/ChangeLog | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'cpu/ChangeLog') diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 09311d1..a5d0843 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,4 +1,13 @@ -2020-02-04 Alan Modra +2020-01-06 Alan Modra + + * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign + bits before shifting rather than masking after shifting. + (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise. + (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise. + (f-dsp-64-u16, f-dsp-8-s24): Likewise. + (f-bitbase32-16-s19-unprefixed): Avoid signed left shift. + +2020-01-04 Alan Modra * m32r.cpu (f-disp8): Avoid left shift of negative values. (f-disp16, f-disp24): Likewise. -- cgit v1.1