From b291c12e8d08d01e598526ac6c9cb20543f41293 Mon Sep 17 00:00:00 2001 From: Xiao Zeng Date: Fri, 15 Dec 2023 09:57:09 +0800 Subject: RISC-V: Imply 'Zicntr' and 'Zihpm' implicitly depended on 'Zicsr' This commit adds support for ratified extensions: 'Zicntr' and 'Zihpm', Which are all implicitly depend on 'Zicsr'. This is based on: bfd/ChangeLog: * elfxx-riscv.c: Add 'Zicntr' and 'Zihpm' -> 'Zicsr'. (riscv_supported_std_z_ext) Add 'Zicntr' and 'Zihpm' to the list. --- bfd/elfxx-riscv.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index d6a3b6c..e121a59 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1144,6 +1144,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"zvl256b", "zvl128b", check_implicit_always}, {"zvl128b", "zvl64b", check_implicit_always}, {"zvl64b", "zvl32b", check_implicit_always}, + {"zicntr", "zicsr", check_implicit_always}, + {"zihpm", "zicsr", check_implicit_always}, {"zcd", "d", check_implicit_always}, {"zcf", "f", check_implicit_always}, {"zfa", "f", check_implicit_always}, @@ -1263,12 +1265,14 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zicbop", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zicboz", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zicond", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zicntr", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }, {"zicsr", ISA_SPEC_CLASS_20191213, 2, 0, 0 }, {"zicsr", ISA_SPEC_CLASS_20190608, 2, 0, 0 }, {"zifencei", ISA_SPEC_CLASS_20191213, 2, 0, 0 }, {"zifencei", ISA_SPEC_CLASS_20190608, 2, 0, 0 }, {"zihintntl", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zihintpause", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }, + {"zihpm", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }, {"zmmul", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zawrs", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zfa", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, -- cgit v1.1