aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Collapse)AuthorFilesLines
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger62-4206/+4359
All the scripts were using this implicitly already, so there's no real change for them, but we want to call it explicitly as the CPP tool is used to generate nltvals.def.
2021-02-28sim: delete unused SIM_EXTRA_LIBDEPSMike Frysinger6-8/+14
This was last used 15 years ago, so clearly not important enough to keep around. Punt it.
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger10-9/+26
We don't need a variable to add a dependency to the "all" target, and having one doesn't really add value. Switch to the target directly for the few ports that actually use this.
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger144-1197/+2156
This file is quite large and is getting unmanageable. Split it apart to follow aclocal best practices by putting one-macro-per-file. There shouldn't be any real functional changes here as can be seen in the configure script regens.
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger4-324/+207
One fewer file to worry about & manage.
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-3/+8
* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types, [VALID/EXTRACT/ENCODE macros] BTYPE_IMM: Renamed from SBTYPE_IMM. JTYPE_IMM: Renamed from UJTYPE_IMM. CITYPE_IMM: Renamed from RVC_IMM. CITYPE_LUI_IMM: Renamed from RVC_LUI_IMM. CITYPE_ADDI16SP_IMM: Renamed from RVC_ADDI16SP_IMM. CITYPE_LWSP_IMM: Renamed from RVC_LWSP_IMM. CITYPE_LDSP_IMM: Renamed from RVC_LDSP_IMM. CIWTYPE_IMM: Renamed from RVC_UIMM8. CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM. CSSTYPE_IMM: Added for .insn without special encoding. CSSTYPE_SWSP_IMM: Renamed from RVC_SWSP_IMM. CSSTYPE_SDSP_IMM: Renamed from RVC_SDSP_IMM. CLTYPE_IMM: Added for .insn without special encoding. CLTYPE_LW_IMM: Renamed from RVC_LW_IMM. CLTYPE_LD_IMM: Renamed from RVC_LD_IMM. RVC_SIMM3: Unused and removed. CBTYPE_IMM: Renamed from RVC_B_IMM. CJTYPE_IMM: Renamed from RVC_J_IMM. * Added new operands and removed the unused ones, C5: Unsigned CL(CS) immediate, added for .insn directive. C6: Unsigned CSS immediate, added for .insn directive. Ci: Unused and removed. C<: Unused and removed. bfd/ PR 27158 * elfnn-riscv.c (perform_relocation): Updated encoding macros. (_bfd_riscv_relax_call): Likewise. (_bfd_riscv_relax_lui): Likewise. * elfxx-riscv.c (howto_table): Likewise. gas/ PR 27158 * config/tc-riscv.c (riscv_ip): Updated encoding macros. (md_apply_fix): Likewise. (md_convert_frag_branch): Likewise. (validate_riscv_insn): Likewise. Also arranged operands, including added C5 and C6 operands, and removed unused Ci and C< operands. * doc/c-riscv.texi: Updated and added CSS/CL/CS types. * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions. * testsuite/gas/riscv/insn.s: Likewise. gdb/ PR 27158 * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros. (decode_j_type_insn): Likewise. (decode_cj_type_insn): Likewise. (decode_b_type_insn): Likewise. (decode): Likewise. include/ PR 27158 * opcode/riscv.h: Updated encoding macros. opcodes/ PR 27158 * riscv-dis.c (print_insn_args): Updated encoding macros. * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM. (match_c_addi16sp): Updated encoding macros. (match_c_lui): Likewise. (match_c_lui_with_hint): Likewise. (match_c_addi4spn): Likewise. (match_c_slli): Likewise. (match_slli_as_c_slli): Likewise. (match_c_slli64): Likewise. (match_srxi_as_c_srxi): Likewise. (riscv_insn_types): Added .insn css/cl/cs. sim/ PR 27158 * riscv/sim-main.c (execute_i): Updated encoding macros.
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger73-45/+274
This is needed to move to automake & its dejagnu-provided logic, and eventually by the unified sim logic. The $arch is used only to figure out which `run` program to use when running tests, and as we move to a single top-level build, we can delete this and use sim/run directly.
2021-02-13sim: rx: mitigate fread warningMike Frysinger2-2/+8
Current toolchains warn about unused result from fread, so mitigate the edge case if fread returns short data. It's not great, but it gets things building again.
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger132-58741/+1168
Rather than hand maintain m4 includes in various autotool files, use AC_CONFIG_MACRO_DIRS to declare the relevant search paths. This simplifies the code, makes it more robust, and cleans out unused logic from configure.
2021-02-13sim: common: delete unused aclocal.m4Mike Frysinger2-15/+4
This was missed when we deleted the common/configure build logic.
2021-02-08sim/rx: enable build with warningsAndrew Burgess3-1/+8
The rx simulator now has no build warnings. Delete the call to SIM_AC_OPTION_WARNINGS in configure.ac, the default yes will be provided by SIM_AC_OUTPUT. sim/rx/ChangeLog: * configure: Regenerate. * configure.ac (SIM_AC_OPTION_WARNINGS): Delete call.
2021-02-08sim/rx: avoid pointer arithmetic on void * pointersAndrew Burgess3-6/+18
Pointer arithmetic on void * pointers results in a GCC warning. Avoid the warning by casting the pointer to its actual type earlier in the function. sim/rx/ChangeLog: * mem.c (mem_put_blk): Rename parameter, add cast from parameter type to local type. Remove cast later in the function. (mem_get_blk): Likewise. * mem.h (mem_put_blk): Rename parameter to match definition. (mem_get_blk): Likewise.
2021-02-08sim/rx: add some missing includesAndrew Burgess3-2/+8
In load.c there's some GCC warnings about undefined functions (bfd_get_elf_phdr_upper_bound and bfd_get_elf_phdrs). To get the declarations of these functions include 'elf-bfd.h'. This headers also pulls in other elf related headers, like 'elf/internal.h' and 'elf/common.h', so these no longer need to be explicitly included from load.c. In trace.c and include for trace.h is missing, again this results in GCC warnings for missing function declarations. sim/rx/ChangeLog: * load.c: Replace 'elf/internal.h' and 'elf/common.h' includes with 'elf-bfd.h' include. * trace.c: Add 'trace.h' include.
2021-02-08sim/rx: use PRIx64 in printf format stringAndrew Burgess2-2/+7
Silence a GCC compiler warning by using PRIx64 in printf format string instead of hard coded "llx". sim/rx/ChangeLog: * reg.c (trace_register_changes): Use PRIx64 in printf format string.
2021-02-08sim/rx: move some variable declarations to the start of the blockAndrew Burgess3-3/+11
For sim code variables still need to be declared at the start of the enclosing block. This silences a few GCC warnings. sim/rx/ChangeLog: * syscalls.c (rx_syscall): Move declaration of some variables to the start of the enclosing block. * trace.c (load_file_and_line): Likewise.
2021-02-08sim/rx: provide a format string for printfAndrew Burgess2-4/+9
Calling printf with the format being a non constant string results in a GCC warning: warning: format not a string literal and no format arguments [-Wformat-nonliteral] Provide a constant format string to printf in the few places this warning is triggered. sim/rx/ChangeLog: * reg.c (fpsw2str): Provide a format string to printf. (trace_register_changes): Likewise.
2021-02-08sim/rx: delete an unused functionAndrew Burgess2-9/+4
This function is not used. sim/rx/ChangeLog: * err.c (execution_error_exit_all): Delete.
2021-02-08sim/rx: mark some functions as staticAndrew Burgess4-3/+9
Some functions that should be marked static. sim/rx/ChangeLog: * fpu.c (check_exceptions): Make static. * gdb-if.c (handle_step): Likewise. * mem.c (mem_put_byte): Likewise.
2021-02-08sim/rx: fill in missing 'void' for empty argument listsAndrew Burgess7-9/+21
Ensure we have 'void' inside empty argument lists. This was causing several warnings for the rx simulator. sim/rx/ChangeLog: * cpu.h (trace_register_changes): Add void parameter type. * err.c (ee_overrides): Likewise. * mem.c (mem_usage_stats): Likewise. (e): Likewise. * reg.c (stack_heap_stats): Likewise. * rx.c (pop): Likewise. (poppc): Likewise. (decode_opcode): Likewise. * syscalls.c (arg): Likewise.
2021-02-08sim/rx: fix an issue where we try to modify a const stringAndrew Burgess2-2/+6
While experimenting with switching on warnings for the rx simulator I discovered this bug. In sim_do_command we get passed a 'const char *' argument. We create a copy of this string to work with locally, but then while processing this we accidentally switch back to reference the original string. sim/rx/ChangeLog: * gdb-if.c (sim_do_command): Work with a copy of the command.
2021-02-08sim/rx: define sim_memory_mapAndrew Burgess2-0/+12
The rx simulator doesn't define sim_memory_map and so fails to link with GDB. Define it now to return NULL, this can be extended later to return an actual memory map if anyone wants this functionality. sim/rx/ChangeLog: * gdb-if.c (sim_memory_map): New function.
2021-02-06sim: erc32/m32c/rl78: add sim_memory_map stub for gdbMike Frysinger6-0/+30
These ports don't use the common sim core, so they weren't providing a sim_memory_map for gdb, so they failed to link with the new memory map logic added for the sim. Add stubs to fix.
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger25-54/+129
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement sim_pc_get. Lets switch the sim-watch core for monitoring pc events to the sim_pc_get API so this module works for all ports, and then we can delete this old back channel of snooping in the port's cpu state -- the code needs the pointer to the pc storage so that it can read out bytes and compare them to the watchrange. This also fixes the logic on multi-cpu sims by removing the limitation of only being able to watch CPU0's state.
2021-02-06sim: add ChangeLog entries for last commitsMike Frysinger2-0/+12
2021-02-06sim: igen: drop libiberty linkageMike Frysinger3-10/+1
This dir doesn't use anything from libiberty, so drop the linkage.
2021-02-06sim: common: switch AC_CONFIG_HEADERSMike Frysinger31-92/+61
The AC_CONFIG_HEADER macro is long deprecated, so switch to the newer form. This also gets rid of the position limitation, and drops support for an argument to SIM_AC_COMMON which we haven't used anywhere.
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger73-233/+434
These settings might have made sense in darker compiler times, but I think they're largely obsolete now. Looking through the values that get used in HDEFINES, it's quite limited, and configure itself should handle them. If we still need something, we can leverage standard autoconf macros instead, after we get a clear user report. TDEFINES was never set anywhere and was always empty, so prune that.
2021-02-04gdb: riscv: enable sim integrationMike Frysinger2-0/+76
Now the simulator can be loaded via gdb using "target sim".
2021-02-04sim: riscv: new portMike Frysinger23-0/+18290
This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better.
2021-01-31sim: cgen-trace: tweak printf callMike Frysinger2-1/+5
GCC warns that we pass a non-string literal as the format string, so add an explicit "%s" to make it happy.
2021-01-31sim: bpf: fix mainloop extract callMike Frysinger2-1/+5
The extract function takes the argbuf, not the scache.
2021-01-31sim: bpf/or1k: fix CGEN_TRACE_EXTRACT nameMike Frysinger5-127/+138
We renamed these years ago, but it looks like the cgen core missed the TRACE_EXTRACT function, so these new ports still used the incompatible common name. Fix those ports to use the right func.
2021-01-31sim: cgen-accfp: Fix pointer sign warningsStafford Horne2-3/+9
When compiling we get the following warnings: common/cgen-accfp.c: In function 'fixsfsi': common/cgen-accfp.c:370:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign] sim_fpu_to32i (&res, &op1, sim_fpu_round_near); ^ common/cgen-accfp.c: In function 'fixdfsi': common/cgen-accfp.c:381:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign] sim_fpu_to32i (&res, &op1, sim_fpu_round_near); ^
2021-01-31sim: v850: cleanup build warningsMike Frysinger4-107/+124
This port only had one minor warning left in it, so fix it and then enable -Werror behavior by deleting the macro call. We'll use the common default now (which is -Werror).
2021-01-31sim: v850: fix handling of SYS_timesMike Frysinger2-2/+5
My recent rewrite of the nltvals generator fixed a bug where SYS_times was not being exported for v850. But that in turn uncovered this bug where the SYS_times codepath had a compile error.
2021-01-31sim: moxie: cleanup build warningsMike Frysinger4-6/+22
This port only had one minor warning left in it, so fix it and then enable -Werror behavior by deleting the macro call. We'll use the common default now (which is -Werror).
2021-01-30sim: common: change gennltvals helper to PythonMike Frysinger6-240/+243
This tool is only run by developers and not in a release build, so rewrite it in Python to make it more maintainable.
2021-01-30sim: m68hc11: fix printf size warningsMike Frysinger2-1/+5
GCC complains %llu is wrong for signed64, so switch to PRIi64.
2021-01-30sim: m68hc11: localize a few functionsMike Frysinger2-6/+12
These are only used in this file and lack prototypes, so gcc complains about it. Add static everywhere to clean that up.
2021-01-30sim: m68hc11: tweak printf-style funcsMike Frysinger2-2/+6
GCC complains that we past non-string literals to a printf style func, so put a %s in here to keep it quiet.
2021-01-30sim: m68hc11: include stdlib.h for prototypesMike Frysinger3-0/+7
These files use abort() & strtod(), so include stdlib.h for them.
2021-01-30sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger23-16/+50
Existing ports already have sizeof_pc set to the same size as sim_cia, so simply make that part of the core code. We already assume this in places by way of sim_pc_{get,set}, and this is how it's documented in the sim-base.h API. There is code to allow sims to pick different register word sizes from address sizes, but most ports use the defaults for both (32-bits), and the few that support multiple register sizes never change the address size (so address defaults to register). I can't think of any machine where the register hardware size would be larger than the address word size either. We have ABIs that behave that way (e.g. x32), but the hardware is still equivalent register sized.
2021-01-30sim: profile: fix bucketing with 64-bit targetsMike Frysinger2-2/+6
When the target's PC is 64-bits, this shift expands into a range of 8 * 8 - 1 which doesn't work with 32-bit constants. Force it to be a 64-bit value all the time and let the compiler truncate it.
2021-01-30sim: m68hc11: stop making hardware conditionalMike Frysinger3-32/+22
This port doesn't build if these hardware modules are omitted, and there's no reason we need to make it conditional at build time, so always enable it. The hardware devices only get turned on if the user requests it at runtime via hardware settings.
2021-01-30sim: hw: replace fgets with getlineMike Frysinger2-30/+41
This avoids fixed sized buffers on the stack.
2021-01-30sim: common: sort nltvals.defMike Frysinger3-90/+95
This was largely already done, but I think people didn't quite notice.
2021-01-29sim: readd myself as a maintainerMike Frysinger2-1/+5
2021-01-22MAINTAINERS: Update my e-mail addressMaciej W. Rozycki1-1/+1
binutils/ * MAINTAINERS: Update my e-mail address. gdb/ * MAINTAINERS: Update my e-mail address. sim/ * MAINTAINERS: Update my e-mail address.
2021-01-19sim: ppc: update version script usageMike Frysinger2-2/+7
This matches the changes in the common code.
2021-01-18sim: bfin: delete accidental ADI copyrightMike Frysinger2-1/+4
This wasn't supposed to be in here when it was first merged as we had specifically disabled it for all the tests (and ADI has papers in place w/the FSF). Clean up this one.