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AgeCommit message (Expand)AuthorFilesLines
2021-11-11sim: testsuite: drop sim_compile cover functionMike Frysinger2-14/+1
2021-11-11sim: cris: stop testing a.out explicitly [ld/13900]Mike Frysinger1-14/+0
2021-11-11sim: io: tweak compiler workaround with error outputMike Frysinger1-3/+3
2021-11-10sim: testsuite: delete unused arm remote host logicMike Frysinger3-24/+0
2021-11-10sim: synacor: simplify test generationMike Frysinger2-7/+4
2021-11-10sim: frv: flip trapdump default back to offMike Frysinger2-2/+2
2021-11-09sim: sh: simplify testsuite a bitMike Frysinger8-82/+12
2021-11-08sim: cris: clean up missing func prototype warningsMike Frysinger4-6/+6
2021-11-06sim: sh: fix conversion of PC to an integerMike Frysinger1-1/+1
2021-11-06sim: sh: clean up time(NULL) callMike Frysinger1-1/+1
2021-11-06sim: sh: break utime logic out of _WIN32 checkMike Frysinger1-1/+8
2021-11-06sim: sh: drop errno externMike Frysinger1-1/+0
2021-11-06sim: sh: fix isnan redefinition with mingw targetsMike Frysinger1-0/+2
2021-11-06sim: arm/bfin/rx: undefine page size from system headersMike Frysinger3-0/+5
2021-11-06sim: ppc: switch to libiberty environ.hMike Frysinger1-2/+2
2021-11-06sim: sh: enable -Werror everywhereMike Frysinger1-3/+0
2021-11-06sim: sh: fix uninitialized variable usage with pdmsbMike Frysinger1-1/+1
2021-11-06sim: sh: constify a few read-only lookup tablesMike Frysinger1-6/+6
2021-11-06sim: sh: fix various parentheses warningsMike Frysinger2-11/+11
2021-11-06sim: sh: fix unused-value warningsMike Frysinger1-3/+3
2021-11-06sim: sh: rework register layout with anonymous unions & structsMike Frysinger3-90/+82
2021-11-06sim: mips: use sim_fpu_to{32,64}u to fix build warningsTiezhu Yang2-7/+4
2021-11-06sim: clarify license text via COPYING fileMike Frysinger3-1155/+0
2021-11-03sim: mips: fix missing prototype in multi-run generationMike Frysinger2-0/+4
2021-11-03sim: ppc: inline common sim-fpu.c logicMike Frysinger3-33/+2
2021-11-03sim: ppc: switch to common builds for callback objectsMike Frysinger3-37/+6
2021-11-03sim: mloop: mark a few conditionally used funcs as unusedMike Frysinger2-3/+4
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger17-199/+707
2021-11-02sim: hoist mn10300 & v850 igen rules up to common buildsMike Frysinger7-153/+386
2021-11-02sim: hoist gencode & opc2c build rules up to common buildsMike Frysinger12-119/+625
2021-11-02gdb/sim: update my email addressAndrew Burgess1-1/+1
2021-11-01sim: iq2000: reduce -Wno-error scopeMike Frysinger2-5/+5
2021-11-01sim: lm32: reduce -Wno-error scopeMike Frysinger3-5/+5
2021-11-01sim: frv: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: m32r: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: mips: reduce -Wno-error scopeMike Frysinger2-8/+8
2021-11-01sim: erc32: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: cris: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: sh: reduce -Wno-error scopeMike Frysinger1-2/+2
2021-11-01sim: or1k: build with -WerrorMike Frysinger1-3/+0
2021-11-01sim: igen: minor build output alignment fixMike Frysinger1-1/+1
2021-11-01sim: ppc: fix the printf fix for 32-bit systemsMike Frysinger1-1/+1
2021-11-01sim: m68hc11: clean up pointer castsMike Frysinger1-3/+3
2021-11-01sim: d10v: clean up pointer castsMike Frysinger1-6/+6
2021-10-31sim: bfin: cast pointers using uintptr_tMike Frysinger28-61/+61
2021-10-31sim: ppc: clean up printf format handlingMike Frysinger9-117/+116
2021-10-31sim: ppc: switch core types to stdint.h typesMike Frysinger1-12/+11
2021-10-31sim: mn10300: clean up pointer castsMike Frysinger2-9/+9
2021-10-31sim: events: clean up trace castsMike Frysinger1-72/+83
2021-10-31sim: ppc: handle \r in igen inputs [PR sim/28476]Mike Frysinger1-8/+16
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