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2016-05-06Add support for FMLA (by element) to AArch64 sim.Nick Clifton2-2/+77
* simulator.c (do_FMLA_by_element): New function. (do_vec_op2): Call it.
2016-04-27Fix a typo in the check for SNANs in the RX simulator.Nick Clifton2-1/+7
PR target/20000 * fpu.c (check_exceptions): Fix typo checking for signalling NANs.
2016-04-27Add support for the --trace-decode option to the AArch64 simulator.Nick Clifton2-7/+317
* simulator.c: Add TRACE_DECODE statements to all emulation functions.
2016-04-10Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.Oleg Endo3-37/+21
sim/sh/ * interp.c (dmul): Split into dmul_s and dmul_u. Use explicit integer width types and simplify implementation. * gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and dmul_u.
2016-04-10Move ChangeLog entries from sim/ChangeLog to sim/sh/ChangeLog.Oleg Endo2-5/+5
2016-04-09Adjust default memory size and stack base address for SH simulator.Oleg Endo2-3/+8
ld/ChangeLog: * sh/interp.c (sim_memory_size): Default init to 30. (parse_and_set_memory_size): Adjust upper bound to 31. sim/ChangeLog: * sh/interp.c (sim_memory_size): Default init to 30. (parse_and_set_memory_size): Adjust upper bound to 31.
2016-04-04Ignore DWARF debug information with a version of 0 - assume that it is padding.Nick Clifton1-12/+189
PR 19872 bfd * dwarf2.c (parse_comp_unit): Skip warning about unrecognised version number if the version is zero. bin * dwarf.c (display_debug_aranges): Skip warning about unrecognised version number if the version is zero.
2016-03-30Fix more bugs in AArch64 simulator.Nick Clifton5-196/+323
* cpustate.c (aarch64_set_reg_s32): New function. (aarch64_set_reg_u32): New function. (aarch64_get_FP_half): Place half precision value into the correct slot of the union. (aarch64_set_FP_half): Likewise. * cpustate.h: Add prototypes for aarch64_set_reg_s32 and aarch64_set_reg_u32. * memory.c (FETCH_FUNC): Cast the read value to the access type before converting it to the return type. Rename to FETCH_FUNC64. (FETCH_FUNC32): New macro. Duplicates FETCH_FUNC64 but for 32-bit accesses. Use for 32-bit memory access functions. * simulator.c (ldrsb_wb): Use sign extension not zero extension. (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise. (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise. (ldrsh_scale_ext, ldrsw_abs): Likewise. (ldrh32_abs): Store 32 bit value not 64-bits. (ldrh32_wb, ldrh32_scale_ext): Likewise. (do_vec_MOV_immediate): Fix computation of val. (do_vec_MVNI): Likewise. (DO_VEC_WIDENING_MUL): New macro. (do_vec_mull): Use new macro. (do_vec_mul): Use new macro. (do_vec_MLA): Read values before writing. (do_vec_xtl): Likewise. (do_vec_SSHL): Select correct shift value. (do_vec_USHL): Likewise. (do_scalar_UCVTF): New function. (do_scalar_vec): Call new function. (store_pair_u64): Treat reads of SP as reads of XZR.
2016-03-29Tidy up AArch64 simulator code.Nick Clifton4-1469/+1413
* cpustate.c: Remove space after asterisk in function parameters. * decode.h (greg): Delete unused function. (vreg, shift, extension, scaling, writeback, condcode): Likewise. * simulator.c: Use INSTR macro in more places. (HALT_NYI): Use sim_io_eprintf in place of fprintf. Remove extraneous whitespace.
2016-03-23More AArch64 simulator improvements.Nick Clifton6-278/+721
* cpustate.c (aarch64_get_FP_half): New function. Read a vector register as a half precision floating point number. (aarch64_set_FP_half): New function. Similar, but for setting a half precision register. (aarch64_get_thread_id): New function. Returns the value of the CPU's TPIDR register. (aarch64_get_FPCR): New function. Returns the value of the CPU's floating point control register. (aarch64_set_FPCR): New function. Set the value of the CPU's FPCR register. * cpustate.h: Add prototypes for new functions. * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields. * memory.c: Use unaligned core access functions for all memory reads and writes. * simulator.c (HALT_NYI): Generate an error message if tracing will not tell the user why the simulator is halting. (HALT_UNREACHABLE): Delete. Delete (unneeded) uses of the macro. (INSTR): New time-saver macro. (fldrb_abs): New function. Loads an 8-bit value using a scaled offset. (fldrh_abs): New function. Likewise for 16-bit values. (do_vec_SSHL): Allow for negative shift values. (do_vec_USHL): Likewise. (do_vec_SHL): Correct computation of shift amount. (do_vec_SSHR_USHR): Correct decision of signed vs unsigned shifts and computation of shift value. (clz): New function. Counts leading zero bits. (do_vec_CLZ): New function. Implements CLZ (vector). (do_vec_MOV_element): Call do_vec_CLZ. (dexSimpleFPCondCompare): Implement. (do_FCVT_half_to_single): New function. Implements one of the FCVT operations. (do_FCVT_half_to_double): New function. Likewise. (do_FCVT_single_to_half): New function. Likewise. (do_FCVT_double_to_half): New function. Likewise. (dexSimpleFPDataProc1Source): Call new FCVT functions. (do_scalar_SHL): Handle negative shifts. (do_scalar_shift): Handle SSHR. (do_scalar_USHL): New function. (do_double_add): Simplify to just performing a double precision add operation. Move remaining code into... (do_scalar_vec): ... New function. (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs functions. (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR registers. (system_set): New function. (do_MSR_immediate): New function. Stub for now. (do_MSR_reg): New function. Likewise. Partially implements MSR instruction. (do_SYS): New function. Stub for now, (dexSystem): Call new functions.
2016-03-18Fix thinko in new GET_VEC_ELEMENT macro.Nick Clifton2-1/+2
* cpustate.c: (GET_VEC_ELEMENT): And fix thinko using macro arguments.
2016-03-18Fix code to check for illegal element numbers when accessing AArch64 vector ↵Nick Clifton2-2/+6
registers in AArch64 sim. * cpustate.c (GET_VEC_ELEMENT): Fix off by one error checking for an invalid element index. (SET_VEC_ELEMENT): Likewise.
2016-03-18Add simulation of MUL and NEG instructions to AArch64 simulator.Nick Clifton5-223/+341
* cpustate.c: Remove spurious spaces from TRACE strings. Print hex equivalents of floats and doubles. Check element number against array size when accessing vector registers. * memory.c: Trace memory reads when --trace-memory is enabled. Remove float and double load and store functions. * memory.h (aarch64_get_mem_float): Delete prototype. (aarch64_get_mem_double): Likewise. (aarch64_set_mem_float): Likewise. (aarch64_set_mem_double): Likewise. * simulator (IS_SET): Always return either 0 or 1. (IS_CLEAR): Likewise. (fldrs_pcrel): Load and store floats using 32-bit memory accesses and doubles using 64-bit memory accesses. (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise. (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise. (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise. (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise. (store_pair_double, load_pair_float, load_pair_double): Likewise. (do_vec_MUL_by_element): New function. (do_vec_op2): Call do_vec_MUL_by_element. (do_scalar_NEG): New function. (do_double_add): Call do_scalar_NEG.
2016-03-03Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP ↵Nick Clifton2-44/+93
instructions. * simulator.c (set_flags_for_sub32): Correct type of signbit. (CondCompare): Swap interpretation of bit 30. (DO_ADDP): Delete macro. (do_vec_ADDP): Copy source registers before starting to update destination register. (do_vec_FADDP): Likewise. (do_vec_load_store): Fix computation of sizeof_operation. (rbit64): Fix type of constant. (aarch64_step): When displaying insn value, display all 32 bits.
2016-02-05sim: mips: fix prog_bfd usageMike Frysinger3-2/+8
We do not want to reference the "base" member directly. We have the STATE_PROG_BFD macro instead to look up the prog_bfd member.
2016-02-04Prevent possible undefined behaviour computing the size of the scache by ↵Nick Clifton2-11/+19
usingunsigned integers instead of signed integers. * cgen-scache.c (scache_option_handler): Prevent possible undefined behaviour computing the size of the scache by using unsigned integers instead of signed integers.
2016-02-03MAINTAINERS: Add Thiemo Seufer back, as a past maintainerMaciej W. Rozycki2-0/+5
Complement commit 26e0f8dbd817 ("* MAINTAINERS: Remove Thiemo Seufer."). * MAINTAINERS (Past sim maintainers): Add Thiemo Seufer.
2016-01-18MIPS: Only build microMIPS specific simulator functions if microMIPS support ↵Andrew Bennett2-0/+42
is required. This fixes PR sim/19441. In the MIPS simulator the microMIPS functions in micromips.igen were not predicated on the microMIPS models. This was causing build issues for some target triples. This patch sets all the microMIPS specific functions to only be built if the micromips32, micromips64 or micromipsdsp models are used. PR sim/19441 * micromips.igen (delayslot_micromips): Enable for `micromips32', `micromips64' and `micromipsdsp' only. (process_isa_mode): Enable for `micromips32' and `micromips64' only. (do_micromips_jalr, do_micromips_jal): Likewise. (compute_movep_src_reg): Likewise. (compute_andi16_imm): Likewise. (convert_fmt_micromips): Likewise. (convert_fmt_micromips_cvt_d): Likewise. (convert_fmt_micromips_cvt_s): Likewise. (FMT_MICROMIPS): Likewise. (FMT_MICROMIPS_CVT_D): Likewise. (FMT_MICROMIPS_CVT_S): Likewise.
2016-01-17Minor comment fixes in sim/common/sim-fpu.c.Joel Brobecker2-67/+71
This patch makes a fair number of fixes in the various comments of sim-fpu.c, mostly to either better conform to the GNU Coding Standards (sentences start with a capital letter, end with a period), or to fix spelling mistakes. sim/common/ChangeLog: * sim-fpu.c: Minor comment fixes throughout.
2016-01-17minor reformatting in sim/common/sim-fpu.c.Joel Brobecker2-2/+9
This patch just makes a copy of formatting changes to better conform with the GNU Coding Style. sim/common/ChangeLog: * sim-fpu.c (print_bits): Minor reformatting (no code change). (sim_fpu_map): Likewise.
2016-01-12sim: mips: workaround 32-bit addr sign extensionsMike Frysinger2-1/+18
The mips bfd will sign extend 32-bit addresses into 64-bit values, so if the entry happens to be 0x80000000 or higher, it is turned to 0xffffffff80000000 which points to memory that doesn't exist. This wasn't an issue until commit 26f8bf63bf36f9062a5cc1afacf71462a as all addresses were automatically truncated there in the translate function to 32-bits. When we cleaned up that code, the full 64-bits were checked leading to many test failures for mips-sde-elf targets and such.
2016-01-11sim: config: do not try to align settingsMike Frysinger2-5/+10
We try to align the output for a few settings, but not most of them. Drop the aligning entirely to be lazy.
2016-01-10sim: move many common settings from CPPFLAGS to config.hMike Frysinger96-2107/+3571
Rather than stuffing the command line with a bunch of -D flags, start moving things to config.h which is managed by autoheader. This makes the makefile a bit simpler and the build output tighter, and it makes the migration to automake easier as there are fewer vars to juggle. We'll want to move the other options out too, but it'll take more work.
2016-01-10sim: drop unused SIM_AC_OPTION_PACKAGESMike Frysinger62-229/+177
This was imported from the ppc sim, but that was only used to control a single file, and that is already governed by the hw models. There's no need to have a sep configure option here, especially since none of the other sims are using it. Even when the code is enabled, there's no runtime overhead.
2016-01-10sim: allow the environment configure option everywhereMike Frysinger73-411/+744
Currently ports have to call SIM_AC_OPTION_ENVIRONMENT explicitly in order to make the configure flag available. There's no real reason to not allow this flag for all ports, so move it to the common sim macro. This way we get standard behavior across all ports too.
2016-01-10sim: allow the assert configure option everywhereMike Frysinger56-54/+626
Currently ports have to call SIM_AC_OPTION_ASSERT explicitly in order to make the configure flag available, which none of them do. There's no real reason to not allow this flag for all ports, so move it to the common sim macro. This way we get standard behavior across all ports.
2016-01-10sim: drop targ-vals.def->nltvals.def indirectionMike Frysinger59-1557/+151
We don't have alternative nltvals.def files, so always symlinking the targ-vals.def file to it doesn't gain us anything. It does make the build more complicated though and a pain to convert to something newer (like automake). Drop the symlinking entirely. In the future, we'll want to explode this file anyways into the respective arch dirs so things can be selected dynamically at runtime, so it's not like we'll be bringing this back.
2016-01-10sim: mips: drop SIM_AC_OPTION_SMP callMike Frysinger3-43/+7
No other port calls this macro directly, and mips has it hardcoded to the default -- disabling smp. In the future we'll enable this for all targets in common code, so tidy up the mips code now.
2016-01-10sim: allow the inline configure option everywhereMike Frysinger79-1006/+1113
Currently ports have to call SIM_AC_OPTION_INLINE explicitly in order to make the configure flag available. There's no real reason to not allow this flag for all ports, so move it to the common sim macro. This way we get standard behavior across all ports too.
2016-01-10sim: drop --enable-sim-{regparm,stdcall} optionsMike Frysinger69-660/+245
These options were never exposed for most sims (just the ppc one), and they are really only useful on 32-bit x86 systems. Considering modern systems tend to be 64-bit x86_64 and how well modern compilers are at optimizing code, these have outlived their usefulness.
2016-01-10sim: drop --enable-sim-cflags optionMike Frysinger66-716/+191
No other sub directory provides such a configuration option, so drop it from the sim dir as well. This cleans up a good bit of code in the process. If people want to use custom flags for just the sim, they can still run configure+make by hand in the sim subdir and use the normal CFLAGS settings.
2016-01-09sim: stop configuring common subdirMike Frysinger4-18/+7
Now that cconfig.h doesn't exist, there's no need to build in the common subdir anymore. We leave the configure/Makefile files in there as there is a helper for developers to generate the nltvals.def file. Once that gets cleaned up in the future though, we can drop the build logic too.
2016-01-09sim: drop common/cconfig.h in favor of a single config.hMike Frysinger99-10674/+11040
The common subdir sets up a cconfig.h file to hold checks for the common code. In practice, most files still end up using config.h instead which just leads to confusion. Merge all the configure checks that went into cconfig.h into SIM_AC_COMMON so we can drop the cconfig.h file altogether. Now there is only a single config.h file like normal.
2016-01-06sim: config: drop use of __DATE__/__TIME__Mike Frysinger2-7/+5
These don't add a whole lot of useful info, and people don't like them as it makes builds unreproducible, so just drop them.
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger59-77/+248
2016-01-03 Mike Frysinger <vapier@gentoo.org> * sim-options.c (sim_parse_args): Mark argv array const. * sim-options.h (sim_parse_args): Likewise.
2016-01-06Change copyright owner to FSF in sim/testsuite/sim/mips/hilo-hazard-4.sJoel Brobecker2-2/+5
sim/testsuite/sim/mips/ChangeLog: * hilo-hazard-4.s: Change copyright ownder to FSF.
2016-01-05sim: msp430: drop duplicate sim_load_file callMike Frysinger2-26/+14
There's no need, or desire, to call sim_load_file from sim_open. The higher levels (gdb/run) take care of calling sim_load for us already.
2016-01-05sim: aarch64: switch to common disassembler tracingMike Frysinger5-137/+30
The output should largely be the same.
2016-01-05sim: bfin: add support disasm tracingMike Frysinger2-0/+6
2016-01-05sim: msp430: switch to common disassembler tracingMike Frysinger5-388/+12
The output format is a bit different, but the new form matches all the other trace lines. Otherwise, it should be functionally equivalent.
2016-01-05sim: trace: add support for disassemblingMike Frysinger3-1/+119
Some targets have started to add support for calling the disassembler automatically when executing code. Add support for that directly into the trace core.
2016-01-05Add myself as the maintainer for the AArch64.Nick Clifton2-0/+5
2016-01-05Fix the execution of the MSP430 simulator testsuite.Nick Clifton2-2/+38
ld * emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the MSP430 hardware multiply address range. * scripttempl/elf32msp430.sc (__romdatastart): Define. (__romdatacopysize): Define. * scripttempl/elf32msp430_3.sc: Likewise. tests * testutils.inc (__pass): Use the LMA addresses of the _passmsg symbol. (__fail): Likewise.
2016-01-04sim: use STATE_MAGIC helperMike Frysinger2-1/+5
2016-01-04sim: unify min/max macrosMike Frysinger16-40/+60
Import defines from gdb/defs.h to the sim core so we can delete the various copies that already exist.
2016-01-04sim: aarch64: drop syscall.h include to fix buildTristan Gingold3-1/+8
The simulator is including syscall.h which is not standard and apparently not required (builds correctly without it on my machine).
2016-01-04sim: parse_args: polish getopt error messageMike Frysinger5-3/+12
The cris sim hit a few failures after the recent getopt logic, and the expected output showed a few ways we can improve things to better match other utils.
2016-01-04sim: punt x86-specific bswap logicMike Frysinger68-699/+187
The compiler/C library should produce reasonable code for htonl/ntohl, and at least glibc tries pretty hard to always produce good code for them. This logic only had support for 32-bit x86 systems anymore, and it's unlikely people were even opting into this, so drop it all.
2016-01-04sim: d10v: gut endian logicMike Frysinger2-77/+5
The compiler should produce reasonable code here in general, so punt the various arch checks and bswap defines. This code will eventually go away entirely when we convert it to the common memory code.
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger44-64/+138
Fix a long standing todo where we let getopt write directly to stderr when an invalid option is passed. Use the sim io funcs instead as they go through the filtered callbacks that gdb wants.
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