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1998-04-22Regenerate configureMichael Meissner6-207/+2085
1998-04-22Add intl supportMichael Meissner2-5/+16
1998-04-21Fixing typos.Jillian Ye1-1/+1
1998-04-21Makefile.in : Use GIF_TRACE to generate the sce_test*_our_gif.out files.Jillian Ye2-14/+18
1998-04-21r5900.igen, sim-main.h, sky-libvpe.c: Add run-time option --float-typeJames Lemke1-0/+19
1998-04-21configure.in, interp.c: Add configure option --with-sim-funit.James Lemke1-0/+20
1998-04-21sim-base.h: Add configure option --with-sim-funit.James Lemke2-0/+16
1998-04-21Add configure option --with-sim-funit for sim & gdb.James Lemke1-0/+10
1998-04-21 * cgen-ops.h (ADDCFSI): Fix.Doug Evans1-0/+3
(SUBCFSI): Tweak. PR 15741.
1998-04-21 * cgen-types.h (GETHIDI,MAKEDI): Tweak.Doug Evans1-0/+4
1998-04-21Fix sanitize tag. The proper keyword is "start-sanitize-*", notJason Molenda1-2/+2
"begin-sanitize-*".
1998-04-21 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.Doug Evans1-0/+2
1998-04-21 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,Doug Evans1-1/+14
try all machs.
1998-04-21Add sim-main.c to things to keep.Jason Molenda1-0/+1
1998-04-21Entry about changing sim_open missing from changelog.Andrew Cagney1-0/+2
1998-04-21Implement ERET instruction.Andrew Cagney5-16/+98
Add {signed,unsigned}_address type.
1998-04-21For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney5-100/+195
HI/LO registers. For old gencode simulator, delete all checks.
1998-04-21* gen-icache.c (print_icache_extraction): When generating #defineAndrew Cagney2-0/+868
force the expression to the correct type.
1998-04-20 * cpu.c,sem.c,sem-switch.c: Regenerate. FromDoug Evans5-317/+337
- cgen/m32r.cpu (h-accum): Add attribute FUN-ACCESS. * m32r.c (m32r_h_accum_get,m32r_h_accum_set): New functions. #include cgen-ops.h. * cpux.c,readx.c,semx.c: Regenerate. * m32rx.c (m32r_h_accum_get,m32r_h_accum_set): New functions. #include cgen-ops.h. Delete inclusion of several unnecessary headers. (m32r_h_accums_get): Sign extend top 8 bits.
1998-04-20* Added one new R5900 COP2 test.Frank Ch. Eigler2-5/+64
Mon Apr 20 18:36:50 1998 Frank Ch. Eigler <fche@cygnus.com> * t-cop2b.c (test01): Additional COP2 tests (QMFC2/QMTC2/LQ/SQ). Don't use $1 ($at) register in inline assembly.
1998-04-20t-pke2.trc t-pke2.vif1expect: Update the testcase to use theJillian Ye3-9/+14
correct registers permitted by gpus.
1998-04-17 * Makefile.in (ULIMIT): New variable.Doug Evans2-3/+12
(sce%.ok): Use it. (.run.ok,.run.ko): Ditto.
1998-04-17* Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions.Frank Ch. Eigler2-12/+21
1998-04-17* New R5900 COP2 test case.Frank Ch. Eigler5-5/+150
1998-04-16* Adapted R5900 COP2 interface code to clarified micro-mode interlockFrank Ch. Eigler2-4/+16
behavior.
1998-04-16Update the testcase to work with gpu2 lib.Jillian Ye3-8/+10
1998-04-16o CVT.S.W and CVT.W.S were reversedAndrew Cagney3-3/+65
o When unpacking an r5900 FP value, was not treating IEEE-NaN's as very large values. o When packing an r5900 FP result from an infinite precision intermediate value was saturating to IEEE-MAX instead of r5900-MAX o The least significant bit of the FP status register did not stick to one.
1998-04-15TX19 uses igen by default.Andrew Cagney2-3/+9
1998-04-15* Changes to make interp.c compile under mips64r5900-sky-elf target.Frank Ch. Eigler2-2/+18
Wed Apr 15 12:41:18 1998 Frank Ch. Eigler <fche@cygnus.com> * interp.c (decode_coproc): Make COP2 branch code compile after igen signature changes.
1998-04-15Re-fix 32 bit DSRAV instruction.Andrew Cagney2-6/+25
Fix mips16 BRANCH, unsigned ADD/SUB and SRAV instructions.
1998-04-15Add EXTEND11().Andrew Cagney1-2/+1
1998-04-15Debug tx19 built from igen sources.Andrew Cagney5-85/+781
Rework ifetch{16,32} to match the more recent do_load function.
1998-04-15Define EXTEND15().Andrew Cagney2-1/+3
1998-04-15Define EXTEND4() and EXTEND5().Andrew Cagney2-0/+7
1998-04-14Tue Apr 14 16:31:35 1998 John Metzler <jmetzler@cygnus.com>John Metzler1-0/+6
* sim-memopt.c (parse_addr): Sunos 4.5 does not hane strtol declared so we need this cast to prevent long long addresses from being misconfigures. Results in access to unmapped memory.
1998-04-14 * sim/m32r/maclh1.cgs: Fix testcase.Doug Evans2-2/+14
* sim/m32r/maclh1-2.cgs: New testcase.
1998-04-14 * semx.c: Regenerate.Doug Evans1-1/+1
PR 15693.
1998-04-14 * Make-common.in (RUNTESTFLAGS): Define.Doug Evans1-0/+5
(check): Pass RUNTESTFLAGS to recursive make.
1998-04-14* Added interactive debugging for vector units, and a bunch of minorIan Carmichael1-0/+3
* things. See ChangeLog.sky for details. * * Modified Files: * .Sanitize ChangeLog.sky Makefile.in sky-libvpe.c sky-vu.c * sky-vu.h sky-vudis.c sky-vudis.h * Added Files: * sky-indebug.c sky-indebug.h sky-interact.c sky-interact.h * sky-console.c sky-console.h
1998-04-14c_gen.pl: Change to use data type "int" instead of "long int" inJillian Ye2-4/+8
function perform_test_read_only.
1998-04-14Implement 32 bit MIPS16 instructions listed in m16.igen.Andrew Cagney6-2560/+1078
1998-04-14* sim-info.c (sim_info): Be verbose when either VERBOSE or STATE_VERBOSE_P.Andrew Cagney1-0/+5
1998-04-14* mn10300_sim.h: Declare all functions in op_utils.c using INLINE_SIM_MAIN.Andrew Cagney1-0/+4
* op_utils.c: Ditto. * sim-main.c: New file. Include op_utils.c.
1998-04-14Broke parsing of !<val>!<val> when adding support for =<field>. Fix.Andrew Cagney3-13/+43
Add support for the -S<suffix> option.
1998-04-14o Use new `!<field>' and `=<field>' operators in spec ofAndrew Cagney3-5/+25
MOV and CMP instructions. o Enable basic inlining. Diable use of SIM_MAIN_INLINE.
1998-04-14Add support for instruction word conditionals of the form `XXX!YYY'Andrew Cagney5-79/+428
and XXX=YYY'. See mn10300 for examples.
1998-04-13* COP2 testing changes.Frank Ch. Eigler4-3/+1550
[ChangeLog] Mon Apr 13 16:51:00 1998 Frank Ch. Eigler <fche@cygnus.com> * Makefile.in (*): Added .vuout/.vuexpect/.vuok test targets for confirming VU instruction trace. (t-cop2): Test COP2 sim using above facility. * t-cop2.vuexpect: New file.
1998-04-13* Fixed a one-character typo in COP2 instruction synthesis.Frank Ch. Eigler2-1/+8
[ChangeLog] Mon Apr 13 16:28:52 1998 Frank Ch. Eigler <fche@cygnus.com> * interp.c (decode_coproc): Add proper 1000000 bit-string at top of VU lower instruction.
1998-04-11 * cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate.Doug Evans4-1051/+1019
* cpux.h,decodex.c,decodex.h,readx.c,semx.c: Regenerate. Main change is to remove ordinal from format names.
1998-04-09* Backed out week-old attempt at enabling quadword memory access onFrank Ch. Eigler3-13/+14
MIPS sim; added PKE sim code fixes. No COP2 testing progress today. [ChangeLog] Thu Apr 9 16:38:23 1998 Frank Ch. Eigler <fche@cygnus.com> * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses instead of QUADWORD. * sim-main.h: Removed attempt at allowing 128-bit access. [ChangeLog.sky] Thu Apr 9 16:42:54 1998 Frank Ch. Eigler <fche@cygnus.com> * sky-pke.c (read_pke_pc): Corrected PKE PC calculation to word granularity.
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