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This old port setup its own uintXX types, but since we require C11
now, we can assume the standard uintXX_t types exist and use them.
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Avoid use of TARGET_<syscall> defines and rely on the callback layers
to resolve these dynamically so we can support multiple syscall layers
instead of assuming the newlib/libgloss numbers all the time.
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The sim-basics.h is too big and includes too many things. This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
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Use INLINE2 instead of INLINE to fix builds when -O0 are used -- the
latter define is omitted at -O0 levels while the former is always
set to inline. These helper funcs are used by defines in here but
the defines aren't always called.
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The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it. So
create a new sim/ namespace and move the headers there.
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It's used in one place and can easily be replaced by using the sim state.
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Almost every port implements these two callbacks in the same way, so
unify them in the common layer.
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Only one place used get_word/put_word, so inline the usage there.
All the rest is dead code so trim it.
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The syscall path was the only code checking the custom exception state
after recent cleanups. Once we change that to the common engine halt
function, we can delete that state entirely.
This also helps highlight some other dead code that we can cull.
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No point in open coding this logic here when we have common size types
already that give the right answer.
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The sim-inline.h header already takes care of this for us, so punt
the local definitions.
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* am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo.
2000-05-29 Alexandre Oliva <aoliva@cygnus.com>
* interp.c (fpu_disabled_exception, fpu_unimp_exception,
fpu_check_signal_exception): Take additional state arguments.
Print exception type and call program_interrupt. Adjust callers.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional
arguments.
* mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception,
fpu_check_signal_exception): Adjust prototypes.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise.
* am33-2.igen: Adjust calls.
2000-05-19 Alexandre Oliva <aoliva@cygnus.com>
* op_utils.c (cmp2fcc): Moved...
* interp.c: ... here.
2000-05-18 Alexandre Oliva <aoliva@cygnus.com>
* am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or
`signed64' where type width is relevant.
2000-05-15 Alexandre Oliva <aoliva@cygnus.com>
* mn10300_sim.h: Include sim-fpu.h.
(FD2FPU, FPU2FD): Enclose the FD argument in parentheses.
(fpu_check_signal_exception): Declare.
(struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise.
(FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare.
* interp.c (fpu_disabled_exception): Document.
(fpu_unimp_exception): Likewise.
(fpu_check_signal_exception): Define.
(reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise.
(reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise.
(REG2VAL, ROUND, VAL2REG): Define shorthands.
(fpu_status_ok): Define.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define.
* am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv,
fmadd, fmsub, fnmadd, fnmsub): Use new functions.
2000-04-27 Alexandre Oliva <aoliva@cygnus.com>
* interp.c (sim_create_inferior): Set PSW bit to enable FP insns
if architecture is AM33/2.0.
* am33.igen: Include am33-2.igen.
2000-04-23 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.igen (movm, call, ret, retf): Check for am33_2 too.
* am33.igen (movm): Likewise.
2000-04-19 Alexandre Oliva <aoliva@cygnus.com>
* am33.igen: Added `*am33_2' to some instructions that were
missing it.
2000-04-07 Alexandre Oliva <aoliva@cygnus.com>
* am33-2.igen: New file. All insns implemented, but FP flags are
only set for fcmp, exceptional conditions are not handled yet.
* Makefile.in (IGEN_INSN): Added am33-2.igen.
(tmp-igen): Added -M am33_2.
* mn10300.igen, am33.igen: Added `*am33_2' to all insns.
* gencode.c: Support FMT_D3.
* mn10300_sim.h (dword): New type.
(struct _state): Added fpregs.
(REG_FPCR, FPCR): New define. All assorted bitmaps.
(XS2FS, AS2FS, Xf2FD): New macros.
(FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise.
(load_dword, store_dword): New functions or macros.
(u642dw, dw2u64): New functions.
(fpu_disabled_exception, fpu_unimp_exception): Declared.
* interp.c (fpu_disabled_exception): Defined; no actual
implementation.
(fpu_unimp_exception): Likewise.
* op_utils.c (cmp2fcc): New function.
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and definitions to ISO C.
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nor mn10300_common.
* configure: Rebuilt.
* Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP,
WITHOUT_COMMON_RUN_OBJS): Remove.
(WITH_COMMON_OBJS): Rename to MN10300_OBJS.
(WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP.
(WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS.
(SIM_EXTRA_CFLAGS): Don't use @sim_gen@.
* interp.c: Remove non-common bits.
* mn10300_sim.h: Likewise.
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Update accordingly.
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genericXor, genericBtst): Use `unsigned32'.
* op_utils.c: Likewise.
* mn10300.igen, am33.igen: Use `unsigned32', `signed32',
`unsigned64' or `signed64' where type width is relevant.
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(struct state): Add more room for processor specific registers.
start-sanitize-am33
(REG_E0): Define.
end-sanitize-am33
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common framework.
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(REG_MDRQ): Define.
* simops.c: Don't abort for trap. Add support for the extended
instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
and "bsch".
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array to make gdb implementation easier.
(REG_*): Add definitions for all registers in the state array.
(SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
* simops.c: Related changes.
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to the OP_* declarations.
(write_template): Similarly for function templates.
* interp.c (insn, extension): Remove global variables. Instead
pass them as arguments to the OP_* functions.
* mn10300_sim.h: Remove decls for "insn" and "extension".
* simops.c (OP_*): Accept "insn" and "extension" as arguments
instead of using globals.
Starting to clean things up.
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(REG_MDR): Define.
* simops.c: Implement "cmp", "calls", "rets", "jmp" and
a few additional random insns.
We can now function calls. We get out of crt0 into main now, then lose
when calls are nested (because don't handle movm yet).
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(REG_D0, REG_A0, REG_SP): Define.
* simops.c: Implement "add", "addc" and a few other random
instructions.
Starting to simulate instructions for the mn10300. Executes some of
the crt0 code now!
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(crude) hashing works, along with dispatch to the OP_* functions.
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* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
Skeleton mn10300 simulator
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