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path: root/sim/h8300/compile.c
AgeCommit message (Expand)AuthorFilesLines
2023-12-22sim: h8300: fix -Wshadow=local warningsMike Frysinger1-2/+2
2023-12-19sim: h8300: fix -Wunused-variable warningsMike Frysinger1-7/+0
2023-12-10Improve performance of the H8 simulatorJeff Law1-2/+96
2023-12-07sim: h8300: fix -Wunused-but-set-variable warningsMike Frysinger1-8/+0
2023-01-18sim: info: convert verbose field to a boolMike Frysinger1-1/+1
2023-01-16sim: assume sys/stat.h always exists (via gnulib)Mike Frysinger1-1/+1
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-23sim: h8300: move arch-specific settings to internal headerMike Frysinger1-0/+2
2022-12-22sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]Mike Frysinger1-4/+4
2022-12-21sim: h8300: invert sim_cpu storageMike Frysinger1-29/+30
2022-12-20sim: move register headers into sim/ namespace [PR sim/29869]Mike Frysinger1-1/+1
2022-11-02sim: h8300: switch to cpu for stateMike Frysinger1-394/+299
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-8/+11
2022-10-31sim: reg: constify store helperMike Frysinger1-1/+1
2022-10-31sim: common: change sim_read & sim_write to use void* buffersMike Frysinger1-3/+4
2022-10-24sim/h8300: avoid self assignmentAndrew Burgess1-2/+2
2021-11-20 Fix intermittent failures on the H8, particularly H8/SX tests.Jeff Law1-1/+2
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+1
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+3
2021-06-17sim: split sim/callback.h include outMike Frysinger1-0/+1
2021-05-28sim: h8300 Fixed different behavior in preinc/predec.Yoshinori Sato1-2/+50
2021-05-17sim: h8300: invert sim_state storageMike Frysinger1-7/+12
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-1/+3
2021-05-08sim: h8300: clean up various warningsMike Frysinger1-2/+5
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-1/+1
2021-04-08Avoid sequence point warning in h8300 simTom Tromey1-1/+2
2021-04-08Do not use old-style definitions in simTom Tromey1-1/+1
2021-01-13sim: h8300: drop separate eightbit memory bufferMike Frysinger1-72/+19
2021-01-11sim: clean up C11 header includesMike Frysinger1-4/+0
2021-01-07sim: h8300: delete opcode cachingMike Frysinger1-131/+4
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger1-2/+3
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger1-3/+1
2015-12-30sim: h8300: inline sim_state_initializeMike Frysinger1-27/+1
2015-12-30sim: h8300: simplify h8300_reg_{fetch,store} funcsMike Frysinger1-53/+17
2015-12-30sim: h8300: switch to common sim-resumeMike Frysinger1-39/+41
2015-12-30sim: h8300: move default endian/alignment to configureMike Frysinger1-4/+0
2015-12-30sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to...Mike Frysinger1-5/+8
2015-12-30sim: h8300: move unused/buggy lregs arrayMike Frysinger1-4/+0
2015-12-24sim: h8300: move h8300-specific options out of common codeMike Frysinger1-0/+54
2015-11-22sim: h8300: delete global callback/kind/nameMike Frysinger1-47/+18
2015-11-15sim: h8300: convert to common sim_{reason,stop}Mike Frysinger1-14/+0
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-6/+0
2015-11-10sim: h8300: drop unused littleendian variableMike Frysinger1-13/+0
2015-04-17sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpersMike Frysinger1-0/+22
2015-04-15sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu stateMike Frysinger1-1/+9
2015-03-24sim: erc32/h8300/m68hc11: trim unused functionsMike Frysinger1-23/+0
2014-12-03callback.h:struct host_callback_struct compilation error on Windows hosts.Joel Brobecker1-2/+3
2014-03-05sim: constify prog_nameMike Frysinger1-1/+1
2014-02-17sim: delete duplicate SIGINT handlingMike Frysinger1-14/+0
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