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2003-10-082003-10-08 Dave Brolley <brolley@redhat.com>Dave Brolley5-1250/+1634
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
2003-10-01 * xtensa-dis.c (fetch_data): Remove numBytes parameter.Bob Wilson2-6/+9
(print_insn_xtensa): Fix call to fetch_data.
2003-09-30[ bfd/ChangeLog ]Chris Demetriou3-3/+52
2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-242003-09-24 Dave Brolley <brolley@redhat.com>Dave Brolley4-157/+149
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
2003-09-14 * i386-dis.c: Convert to ISO C90 prototypes.Andreas Jaeger6-380/+231
* i370-dis.c: Likewise. * i370-opc.c: Likewiwse. * i960-dis.c: Likewise. * ia64-opc.c: Likewise.
2003-09-092003-09-09 Dave Brolley <brolley@redhat.com>Dave Brolley2-6/+10
* frv-desc.c: Regenerated.
2003-09-082003-09-08 Dave Brolley <brolley@redhat.com>Dave Brolley4-31/+60
On behalf of Doug Evans <dje@sebabeach.org> * Makefile.am (run-cgen): Pass new args archfile and opcfile to cgen.sh. (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc, stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files to cgen.sh. (stamp-frv): Delete hardcoded path spec workaround. * Makefile.in: Regenerate. * cgen.sh: New args archfile and opcfile. Pass on to cgen.
2003-09-04Add binutils support for v850e1 processorNick Clifton3-76/+91
2003-09-04 * ppc-dis.c (struct dis_private): New.Alan Modra3-59/+88
(powerpc_dialect): Make static. Accept -Many in addition to existing options. Save dialect in dis_private. (print_insn_big_powerpc): Retrieve dialect from dis_private. (print_insn_little_powerpc): Likewise. (print_insn_powerpc): Call powpc_dialect here. Remove unnecessary efs/altivec check. Try harder to disassemble if given -Many. * ppc-opc.c (insert_fxm): Expand comment. (PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY. (POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise. (POWER4): Remove PPCCOM. (PPCONLY): Don't define. Update all occurrences to PPC.
2003-09-03Index: opcodes/ChangeLogAndrew Cagney4-3/+58
2003-09-03 Andrew Cagney <cagney@redhat.com> * dis-init.c (init_disassemble_info): New file and function. * Makefile.am (CFILES): Add "dis-init.c". (libopcodes_la_SOURCES): Add "dis-init.c". (dis-init.lo): Specify dependencies. * Makefile.in: Regenerate. Index: include/ChangeLog 2003-08-27 Andrew Cagney <cagney@redhat.com> * dis-asm.h (init_disassemble_info): Declare. (INIT_DISASSEMBLE_INFO): Redefine as a call to init_disassemble_info. (INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto. Index: binutils/ChangeLog 2003-09-03 Andrew Cagney <cagney@redhat.com> * objdump.c: Refer to init_disassemble_info in comments. (disassemble_data): Replace INIT_DISASSEMBLE_INFO with init_disassemble_info.
2003-09-032003-09-03 Dave Brolley <brolley@redhat.com>Dave Brolley8-319/+443
* frv-*: Regenerated.
2003-09-02 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.Alan Modra3-243/+223
Move duplicate mnemonic entries together. Use RS instead of RT on all mt*. * ppc-dis.c: Convert to ISO C.
2003-08-292003-08-29 Dave Brolley <brolley@redhat.com>Dave Brolley3-6/+24
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from $(srcdir)/../cpu temporarily when regenerating source files. * Makefile.in: Regenerated.
2003-08-19Add support for unindexed form of Addressing Mode 5Nick Clifton2-6/+19
2003-08-19 * ppc-opc.c (PPC440): Define.Alan Modra2-88/+98
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci, icread instructions when PPC440. Add dlmzb instruction.
2003-08-14 * dep-in.sed: Remove libintl.h.Alan Modra4-12/+20
* Makefile.am (POTFILES.in): Unset LC_COLLATE. Run "make dep-am". * Makefile.in: Regenerate.
2003-08-09fix typo in ChangeLogMichael Meissner1-6/+6
2003-08-09regenerate cgen files after prototype fixMichael Meissner22-994/+911
2003-08-08Fix typos in last changeMichael Meissner1-3/+6
2003-08-08fix changelog dateMichael Meissner1-1/+1
2003-08-08Convert cgen to C-90Michael Meissner7-308/+331
2003-08-06Updated French translationsNick Clifton2-19/+23
2003-08-05Add new Dutch translation.Nick Clifton4-2/+817
2003-07-302003-07-30 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-14/+7
* i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
2003-07-30Updated Romanian translationNick Clifton2-100/+446
2003-07-29 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.Jakub Jelinek2-3/+7
2003-07-24Updated French translationsNick Clifton2-91/+438
2003-07-18* objdump.c (main) :Accept multiple -M switch.Nick Clifton2-19/+24
* doc/binutils.texi: Document that multiple -M switches are accepted and that a single -M switch can contain comma separated options. * arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be NUL terminated. (parse_disassembler_options): Allow options to be space or comma separated.
2003-07-17Update translationsNick Clifton4-217/+924
2003-07-15include/opcode/Richard Sandiford2-0/+8
* mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
2003-07-14Update Turkish translation files for bfd, gas and opcodesNick Clifton4-104/+452
2003-07-11Update pot files.Alan Modra2-29/+55
2003-07-102000-05-25 Alexandre Oliva <aoliva@cygnus.com>Alexandre Oliva3-1/+352
* m10300-dis.c (disassemble): Negate negative accumulator's shift. 2000-05-24 Alexandre Oliva <aoliva@cygnus.com> * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume 32-bit longs when sign-extending operands. 2000-04-20 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs. * m10300-dis.c (HAVE_AM33_2): Define. (disassemble): Use it. (HAVE_AM33): Redefine. (print_insn_mn10300): Fix mask for 5-byte extended insns. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Renamed AM332 to AM33_2. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * m10300-opc.c: Defined AM33 2.0 register operands. Added support for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns. * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended insn code of AM33 2.0. (disassemble): Recognize FMT_D3. Print out FP register names.
2003-07-092003-07-09 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-2/+8
* mips-dis.c (set_default_mips_dis_options): Get BFD from the disassembler_info's section, rather than from the disassembler_info's symbols pointer.
2003-07-07 * ppc-opc.c: Remove NULL pointer checks. Formatting. RemoveAlan Modra3-93/+79
extraneous ATTRIBUTE_UNUSED. * ppc-dis.c (print_insn_powerpc): Always pass a valid address to operand->extract.
2003-07-04 * ppc-opc.c: Convert to C90, removing unnecessary prototypes andAlan Modra2-267/+221
casts. Formatting.
2003-07-04 * ppc-opc.c: Remove PARAMS from prototypes.Alan Modra2-115/+136
(FXM4): Define. (insert_fxm): New function, used by both FXM and FXM4. (extract_fxm): Likewise. (XFXFXM_MASK): Remove 1 << 20 term. (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
2003-07-01 * s390-dis.c (s390_extract_operand): Add support for long displacements.Martin Schwidefsky5-14/+224
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990. * s390-opc.c (D20_20): Add define for 20 bit displacements. (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD, INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add new instruction formats. (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD, MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise. (s390_opformats): Likewise. * s390-opc.txt: Add new instructions for cpu type z990. Add missing hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-06-23gas/H.J. Lu2-17/+116
2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-19 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.Christian Groessler4-793/+992
(print_insn_z8k): Correctly check return value from z8k_lookup_instr call. (unparse_instr): Handle CLASS_IRO case. * z8kgen.c: Fix function definitions. Fix formatting. (opt): Add brk opcode alias for non-simulator breakpoint. Add missing and fix existing in/out and sin/sout opcode definitions. (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out opcodes. (internal): Check p->flags for non-zero before dereferencing it. (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added opcodes and renumber the remaining lines repectively. (main): Remove "-d" command line switch. * z8k-opc.h: Regenerate with new z8kgen.c.
2003-06-11bfd/H.J. Lu2-11/+19
2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. binutils/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gas/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gprof/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. ld/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. opcodes/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise.
2003-06-10* bfd/Makefile.am (config.status): Depend on version.h.Alan Modra4-15/+25
Run "make dep-am" in bfd/ and elsewhere, and regen files.
2003-06-10opcodes:Doug Evans24-36/+48
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
2003-06-10Add "attn", "lq" and "stq" power4 insns.Alan Modra2-42/+161
2003-06-10opcodes/Richard Sandiford2-1/+6
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
2003-06-05Add code to handle even-numbered only register operandsNick Clifton9-182/+364
2003-06-032003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2-190/+538
and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx. * h8300-dis.c: Ditto.
2003-06-03FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.Nick Clifton15-599/+961
Use maintainer mode to regenerate ports.
2003-05-242003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-4/+12
gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
2003-05-20Regenerate - forgot to commit with last commitAndreas Jaeger1-2/+2
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