| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2013-11-19 | 2013-11-19 Catherine Moore <clm@codesourcery.com> | Catherine Moore | 3 | -57/+64 |
| 2013-11-18 | Revert "Add support for AArch64 trace unit registers." | Yufeng Zhang | 2 | -236/+12 |
| 2013-11-15 | gas/ | Yufeng Zhang | 2 | -0/+244 |
| 2013-11-15 | MIPS/opcodes: Add MFCR and MTCR data dependencies | Maciej W. Rozycki | 2 | -2/+7 |
| 2013-11-11 | Fix ChangeLog entries from earlier commit. | Catherine Moore | 1 | -0/+11 |
| 2013-11-11 | 2013-11-11 Catherine Moore <clm@codesourcery.com> | Catherine Moore | 2 | -90/+90 |
| 2013-11-08 | Remove CpuNop from CPU_K6_2_FLAGS | H.J. Lu | 3 | -2/+8 |
| 2013-11-05 | gas/ | Yufeng Zhang | 2 | -310/+330 |
| 2013-11-05 | gas/ | Yufeng Zhang | 7 | -35/+68 |
| 2013-11-05 | opcodes/ | Yufeng Zhang | 2 | -4/+19 |
| 2013-10-30 | S/390: Disassemble 31-bit binaries with "zarch" opcode set by default | Andreas Arnez | 2 | -11/+6 |
| 2013-10-15 | Fix neon vshll disassembly. | Ramana Radhakrishnan | 2 | -3/+7 |
| 2013-10-14 | 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> | Chao-ying Fu | 4 | -2/+1188 |
| 2013-10-14 | 2013-10-13 Sandra Loosemore <sandra@codesourcery.com> | Sandra Loosemore | 2 | -2/+7 |
| 2013-10-12 | Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcn | H.J. Lu | 4 | -24/+82 |
| 2013-10-11 | * Removed short_hand field from opcode table and | Sean Keys | 3 | -228/+209 |
| 2013-10-11 | opcodes/ | Roland McGrath | 2 | -20/+33 |
| 2013-10-10 | opcodes/ | Roland McGrath | 3 | -13/+24 |
| 2013-10-10 | opcodes/ | Roland McGrath | 2 | -3/+8 |
| 2013-10-08 | opcodes/ | Jan Beulich | 3 | -26/+33 |
| 2013-10-07 | 2013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com> | Chao-ying Fu | 2 | -4/+8 |
| 2013-09-30 | Add Size64 to movq/vmovq with Reg64 operand | H.J. Lu | 3 | -16/+21 |
| 2013-09-30 | Add AMD bdver4 support. | Saravanan Ekanathan | 3 | -0/+13 |
| 2013-09-20 | * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonical | Alan Modra | 2 | -5/+15 |
| 2013-09-17 | opcodes/ | Richard Sandiford | 2 | -1/+5 |
| 2013-09-04 | PR gas/15914 | Nick Clifton | 2 | -3/+24 |
| 2013-09-02 | 2013-09-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> | Andreas Krebbel | 2 | -3/+9 |
| 2013-08-28 | * aarch64-opc.c (aarch64_logical_immediate_p): Return FALSE if the | Nick Clifton | 2 | -1/+7 |
| 2013-08-23 | opcodes/ | Maciej W. Rozycki | 2 | -3/+6 |
| 2013-08-23 | PR binutils/15834 | Nick Clifton | 4 | -5/+12 |
| 2013-08-19 | include/opcode/ | Richard Sandiford | 3 | -6/+17 |
| 2013-08-19 | include/opcode/ | Richard Sandiford | 6 | -13/+41 |
| 2013-08-19 | Remove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3F | H.J. Lu | 3 | -16/+8 |
| 2013-08-06 | opcodes/ | Richard Sandiford | 2 | -0/+6 |
| 2013-08-05 | * sparc-opc.c (v9andleon): Fix thinko. | Eric Botcazou | 1 | -2/+2 |
| 2013-08-05 | gas/ | Eric Botcazou | 3 | -13/+38 |
| 2013-08-04 | include/opcode/ | Richard Sandiford | 3 | -16/+248 |
| 2013-08-03 | include/opcode/ | Richard Sandiford | 3 | -13/+21 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 2 | -1/+4 |
| 2013-08-01 | include/opcode/ | Richard Sandiford | 5 | -2573/+2575 |
| 2013-08-01 | include/opcode/ | Richard Sandiford | 3 | -42/+51 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 2 | -172/+176 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 3 | -18/+24 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 3 | -6/+13 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 2 | -31/+37 |
| 2013-08-01 | opcodes/ | Richard Sandiford | 2 | -1/+5 |
| 2013-07-30 | opcodes/ | Peter Bergner | 2 | -28/+15 |
| 2013-07-26 | Add Intel AVX-512 support | H.J. Lu | 9 | -15036/+43415 |
| 2013-07-25 | opcodes/ | Richard Sandiford | 2 | -4/+10 |
| 2013-07-25 | Support Intel SHA | H.J. Lu | 7 | -2782/+2981 |
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