Age | Commit message (Collapse) | Author | Files | Lines |
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pr17706
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PR 17293.
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decide which PALcode set to include.
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* vu0.h: Remove.
* Makefile.am: Rebuild dependencies.
* Makefile: Rebuild.
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operand name macros.
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* ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
(extract_mbe): Likewise.
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attributes.
(print_insn_little_arm): Likewise.
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opcode table as something that is "opened/closed".
* cgen-asm.c (all fns): New first arg of opcode table descriptor.
(cgen_asm_init): Delete.
(cgen_set_parse_operand_fn): New function.
* cgen-dis.c (all fns): New first arg of opcode table descriptor.
(cgen_dis_init): Delete.
* cgen-opc.c (all fns): New first arg of opcode table descriptor.
(cgen_current_{opcode_table_mach,endian}): Delete.
* cgen-asm.in (all fns): New first arg of opcode table descriptor.
* cgen-dis.in (all fns): Ditto.
* cgen-opc.in (all fns): Ditto.
* m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
* cgen-asm.in (parse_insn_normal): Ignore case in mnemonics.
* cgen-dis.in (print_normal): Split into two.
(print_address): New function.
(extract_insn_normal): Clarify insn_value arg.
(print_int_insn): Renamed from print_insn.
(print_insn): New arg.
(print_insn_@arch@): Open opcode table if not already done so.
Move reading of insn into print_insn.
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Thu Jul 30 21:41:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
instructions.
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the opcode table.
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operand.
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phmsubh respectively.
pr16537
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CGEN_EXTRACT_FN.
(@arch@_cgen_get_insn_operands): @arch@_cgen_get_operand renamed to
@arch_cgen_get_int_operand.
* cgen-asm.in (insert_insn_normal): New arg `pc', callers updated.
Update call to @arch@_cgen_insert_operand.
(@arch@_cgen_assemble_insn): Update call to CGEN_INSERT_FN.
* cgen-dis.in (print_normal): Delete use of CGEN_PCREL_OFFSET.
(extract_insn_normal): New arg `pc', callers updated.
Update call to @arch@_cgen_extract_operand.
(print_insn): Update call to CGEN_EXTRACT_FN.
* m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
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"mulu".
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* i386-dis.c (ckprefix): Handle fwait specially only when it isn't
the first prefix.
(dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
than `fnstsw %eax'.
(OP_J): Remove unnecessary subtraction when 16-bit displacement
will be masked later.
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instructions.
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from raw register #s to symbolic names to make debugging easier.
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(CGEN): New variable.
(CGENFILES): object.scm renamed to cos.scm.
(run-cgen): Renamed from cgen. stamp file renamed to stamp-$prefix.
(stamp-m32r): Pass prefix to run-cgen.
* Makefile.in: Regenerate.
* cgen-asm.in: @arch@-opc.h renamed to @prefix@-opc.h.
* cgen-dis.in: Ditto.
* cgen-opc.in: Ditto.
* cgen.sh: New args cgen,prefix. Delete args scheme,schemeflags.
* configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
* configure: Regenerate.
* m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
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the DVP_OPERAND_RELOC_11_S4 relocation.
* dvp-opc.c (LIMM11, LUIMM15): New symbol types
DVP_OPERAND_RELOC_U15_S3 and DVP_OPERAND_RELOC_11_S4 to allow labels to
be used as immediate values.
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Why oh why didn't they take our advice about register prefixing. It would
have avoided the ambigious syntax issues. Sigh.
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accidentally match a mn10300 instruction when we really
wanted an am33 instruction.
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selected machine.
* m10300-opc.c: Add field indicating the particular variant of
the mn10300 each instruction is available on.
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* Makefile.am: Rebuild dependencies.
(CFILES): Add vax-dis.c.
(ALL_MACHINES): Add vax-dis.lo.
* aclocal.m4: Rebuild with current libtool.
* configure, Makefile.in: Rebuild.
Fri Jun 26 12:03:20 1998 Klaus Kaempf <kkaempf@progis.de>
* vax-dis.c: New file, from work by Pauline Middelink
<middelin@polyware.iaf.nl>.
* disassemble.c (ARCH_vax): Define if ARCH_all.
(disassembler): Add case for ARCH_vax.
* makefile.vms: Support compilation on vms/vax.
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4 byte instructions.
(disassemble): Correctly handle FMT_D10 instructions.
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am33 shift instructions.
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3 byte instructions.
(disassemble): Handle new instruction formats FMT_D6, FMT_D7, FMT_D8
FMT_D9 and FMT_D10. Handle various new opcode flags for the am33.
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(mn10300_opcodes): Reorder so as to try and select opcodes from
the core chip when multiple alternatives exist. Change several
am33 instructions to use IMM32_HIGH8_MEM. Fix typos in "mac" and
"macbu" instructions. Fix typos in a couple DSP instructions too.
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