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2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-04-29Also use unsigned 8-bit immediate values for the LDRC and SETRC insns.Nick Clifton1-2/+2
PR 22699 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC and SETRC insns.
2020-04-29Fix the disassmbly of SH instructions which have an unsigned 8-bit immediate ↵Nick Clifton1-17/+18
operand. PR 22699 opcodes * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use IMM0_8S for arithmetic insns and IMM0_8U for logical insns. * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add IMM0_8U case. gas * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to IMM0_8S and add support for IMM0_8U. * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an unsigned 8-bit immediate. * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-08-20Tidy bit twiddlingAlan Modra1-4/+1
* sh-opc.h (MASK): Simplify.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-10-07bfd_merge_private_bfd_data tidyAlan Modra1-1/+0
bfd_merge_private_bfd_data and _bfd_generic_verify_endian_match are linker functions, so move them to linker.c. bfd/ * Makefile.am (LIBBFD_H_FILES): Update. * doc/Makefile.am (LIBBFD_H_DEP): Likewise. * cpu-sh.c (sh_merge_bfd_arch): Move to.. * elf32-sh.c: ..here, and make static. * elf32-arc.c (arc_elf_merge_private_bfd_data): Delete extraneous error. * elf32-cris.c (cris_elf_merge_private_bfd_data): Don't call _bfd_generic_verify_endian_match. * elf32-microblaze.c (microblaze_elf_merge_private_bfd_data): Delete. (bfd_elf32_bfd_merge_private_bfd_data): Define as _bfd_generic_verify_endian_match. * elf32-mt.c (mt_elf_merge_private_bfd_data): Don't test boolean == FALSE. * elf32-xgate.c (_bfd_xgate_elf_merge_private_bfd_data): Delete. (bfd_elf32_bfd_merge_private_bfd_data): Don't define. * elf32-xgate.h (_bfd_xgate_elf_merge_private_bfd_data): Delete. * libbfd-in.h (_bfd_generic_verify_endian_match): Delete. * libbfd.c (_bfd_generic_verify_endian_match): Move to.. * linker.c: ..here, and make internal. * bfd.c (bfd_merge_private_bfd_data): Move to.. * linker.c: ..here. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. opcodes/ * sh-opc.h (sh_merge_bfd_arch): Delete prototype.
2016-06-01add more extern CTrevor Saunders1-0/+8
opcodes/ChangeLog: 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * nds32-asm.h: Add extern "C". * sh-opc.h: Likewise. bfd/ChangeLog: 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf32-hppa.h: Add extern "C". * elf32-nds32.h: Likewise. * elf32-tic6x.h: Likewise. include/ChangeLog: 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf/mips.h: Likewise. * elf/sh.h: Likewise. * opcode/d10v.h: Likewise. * opcode/d30v.h: Likewise. * opcode/ia64.h: Likewise. * opcode/mips.h: Likewise. * opcode/ppc.h: Likewise. * opcode/sparc.h: Likewise. * opcode/tic6x.h: Likewise. * opcode/v850.h: Likewise.
2016-05-31sh: make constant unsigned to avoid narrowingTrevor Saunders1-1/+1
Shifting into the sign bit of a 32 bit int and then converting to a unsigned type is less straight forward than just shifting an unsigned value. opcodes/ChangeLog: 2016-05-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned constant.
2016-03-07Add const qualifiers at various places.Trevor Saunders1-1/+1
opcodes * mcore-opc.h: Add const qualifiers. * microblaze-opc.h (struct op_code_struct): Likewise. * sh-opc.h: Likewise. * tic4x-dis.c (tic4x_print_indirect): Likewise. (tic4x_print_op): Likewise. include * opcode/dlx.h (struct dlx_opcode): Add const qualifiers. * opcode/h8300.h (struct h8_opcode): Likewise. * opcode/hppa.h (struct pa_opcode): Likewise. * opcode/msp430.h: Likewise. * opcode/spu.h (struct spu_opcode): Likewise. * opcode/tic30.h (struct _register): Likewise. * opcode/tic4x.h (struct tic4x_register): Likewise. (struct tic4x_cond): Likewise. (struct tic4x_indirect): Likewise. (struct tic4x_inst): Likewise. * opcode/visium.h (struct reg_entry): Likewise. gas * config/tc-arc.c: Add const qualifiers. * config/tc-h8300.c (md_begin): Likewise. * config/tc-ia64.c (print_prmask): Likewise. * config/tc-msp430.c (msp430_operands): Likewise. * config/tc-nds32.c (struct suffix_name): Likewise. (struct nds32_parse_option_table): Likewise. (struct nds32_set_option_table): Likewise. (do_pseudo_pushpopm): Likewise. (do_pseudo_pushpop_stack): Likewise. (nds32_relax_relocs): Likewise. (nds32_flag): Likewise. (struct nds32_hint_map): Likewise. (nds32_find_reloc_table): Likewise. (nds32_match_hint_insn): Likewise. * config/tc-s390.c: Likewise. * config/tc-sh.c (get_specific): Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic4x.c (tic4x_inst_add): Likewise. (tic4x_indirect_parse): Likewise. * config/tc-vax.c (vax_cons): Likewise. * config/tc-z80.c (struct reg_entry): Likewise. * config/tc-epiphany.c (md_assemble): Adjust. (epiphany_assemble): New function. (epiphany_elf_section_rtn): Call do_align directly. (epiphany_elf_section_text): Likewise. * config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise. (ip2k_elf_section_text): Likewise. * read.c (do_align): Make it not static. * read.h (do_align): New prototype.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-09-23Fix compile time warnings generated when compiling with clang.Nick Clifton1-4/+4
bfd * bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in order to avoid problems with left shifting negative values. (abs32code): Likewise. * mach-o.c (FILE_ALIGN): Likewise. * coff-rs6000.c (xcoff_debug_sections): Delete unused static array. * elf32-visium.c (visium_reloc_map): Likewise. * elf32-arm.c (elf32_arm_final_link_relocate): Remove useless calls to abs function. * elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise. * elf32-score.c (score_elf_final_link_relocate): Likewise. * elf32-score7.c (score_elf_final_link_relocate): Likewise. * elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead of shifting to create a negative mask. * elf32-msp430.c (elf_backend_special_sections): Define. * elfxx-mips.c (got_ofst_reloc_p): Delete unused function. (got_hi16_reloc_p): Delete unused function. * ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of partition name. gas * config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int. opcode * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left shifting. ld * emultempl/elf32.em (ehdr_start_empty): New static variable. (before_allocation): Use it to initialise ehdr_start_save. * emultempl/pe.em (write_build_id): Remove useless double parenthesis. * emultempl/pep.em (write_build_id): Likewise. opcodes * bfin-dis.c (fmtconst): Remove unnecessary call to the abs function. * tic30-dis.c (print_branch): Likewise. * cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed value before left shifting. * fr30-ibld.c (fr30_cgen_extract_operand): Likewise. * hppa-dis.c (print_insn_hppa): Likewise. * mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static array. * msp430-dis.c (msp430_singleoperand): Likewise. (msp430_doubleoperand): Likewise. (print_insn_msp430): Likewise. * nds32-asm.c (parse_operand): Likewise. * sh-opc.h (MASK): Likewise. * v850-dis.c (get_operand_value): Likewise.
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-6/+6
2015-02-25[SH] Fix clrs, sets, pref insn arch memberships.Oleg Endo1-3/+3
opcodes/ * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of arch_sh_up. (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of arch_sh2a_nofpu_or_sh4_nommu_nofpu_up. gas/testsuite/ * gas/sh/arch/arch.exp: Replace dead code to generate expected .s files with ... * gas/sh/arch/sh-opc-gen-as.pl: ... this new script. * gas/sh/arch/arch_expected.txt: Regenerate. * gas/sh/arch/sh-dsp.s: Likewise. * gas/sh/arch/sh-opc-gen-as.pl: Likewise. * gas/sh/arch/sh.s: Likewise. * gas/sh/arch/sh2.s: Likewise. * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. * gas/sh/arch/sh2a-nofpu.s: Likewise. * gas/sh/arch/sh2a-or-sh3e.s: Likewise. * gas/sh/arch/sh2a-or-sh4.s: Likewise. * gas/sh/arch/sh2a.s: Likewise. * gas/sh/arch/sh2e.s: Likewise. * gas/sh/arch/sh3-dsp.s: Likewise. * gas/sh/arch/sh3-nommu.s: Likewise. * gas/sh/arch/sh3.s: Likewise. * gas/sh/arch/sh3e.s: Likewise. * gas/sh/arch/sh4-nofpu.s: Likewise. * gas/sh/arch/sh4-nommu-nofpu.s: Likewise. * gas/sh/arch/sh4.s: Likewise. * gas/sh/arch/sh4a-nofpu.s: Likewise. * gas/sh/arch/sh4a.s: Likewise. * gas/sh/arch/sh4al-dsp.s: Likewise. ld/testsuite/ * ld-sh/arch/arch_expected.txt: Regenerate. * ld-sh/arch/sh-dsp.s: Likewise. * ld-sh/arch/sh.s: Likewise. * ld-sh/arch/sh2.s: Likewise. * ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. * ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. * ld-sh/arch/sh2a-nofpu.s: Likewise. * ld-sh/arch/sh2a-or-sh3e.s: Likewise. * ld-sh/arch/sh2a-or-sh4.s: Likewise. * ld-sh/arch/sh2a.s: Likewise. * ld-sh/arch/sh2e.s: Likewise. * ld-sh/arch/sh3-dsp.s: Likewise. * ld-sh/arch/sh3-nommu.s: Likewise. * ld-sh/arch/sh3.s: Likewise. * ld-sh/arch/sh3e.s: Likewise. * ld-sh/arch/sh4-nofpu.s: Likewise. * ld-sh/arch/sh4-nommu-nofpu.s: Likewise. * ld-sh/arch/sh4.s: Likewise. * ld-sh/arch/sh4a-nofpu.s: Likewise. * ld-sh/arch/sh4a.s: Likewise. * ld-sh/arch/sh4al-dsp.s: Likewise.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2007-07-05Change source files over to GPLv3.Nick Clifton1-10/+13
2005-05-07Update the address and phone number of the FSFNick Clifton1-1/+1
2005-03-03update copyright datesAlan Modra1-2/+2
2005-01-17Fix SH2A machine variants in order to correctly select instruction inheritanceNick Clifton1-277/+317
2004-07-29include/elf/ChangeLog:Alexandre Oliva1-37/+155
Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh.h (EF_SH2A_NOFPU): New. 2003-12-01 Michael Snyder <msnyder@redhat.com> * sh.h (EF_SH2A): New. bfd/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * archures.c (bfd_mach_sh2a_nofpu): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH2A_NOFPU_NEXT): New. (arch_info_struct): Add sh2a_nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu. 2003-12-29 DJ Delorie <dj@redhat.com> * reloc.c: Add relocs for sh2a. * bfd-in2.h: Regenerate. * libbfd.hh: Regenerate. 2003-12-01 Michael Snyder <msnyder@redhat.com> * archures.c (bfd_mach_sh2a): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums. (SH2A_NEXT): New. (arch_info_struct): Add sh2a. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a. binutils/ChangeLog: * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and EF_SH2A_NOFPU. gas/ChangeLog: Introduce SH2a support. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (get_specific): Change arch_sh2a_up to arch_sh2a_nofpu_up. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition to end of conditional expression. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c: Add sh2a-nofpu support. 2003-12-29 DJ Delorie <dj@redhat.com> * tc-sh.c: Add sh2a support. (parse_reg): Add tbr. (parse_at): Support @@(disp,tbr). (get_specific): Support sh2a opcodes. (insert4): New, for 4 byte relocs. (build_Mytes): Support sh2a opcodes. (md_apply_fix3_Mytes): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * config/tc-sh.c (md_parse_option): Handle sh2a. (sh_elf_final_processing): Ditto. gas/testsuite/ChangeLog: 2003-12-30 DJ Delorie <dj@redhat.com> * gas/sh/sh2a.s: New. * gas/sh/sh2a.d: New. * gas/sh/basic.exp: Add it. opcodes/ChangeLog: Introduce SH2a support. * sh-opc.h (arch_sh2a_base): Renumber. (arch_sh2a_nofpu_base): Remove. (arch_sh_base_mask): Adjust. (arch_opann_mask): New. (arch_sh2a, arch_sh2a_nofpu): Adjust. (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise. (sh_table): Adjust whitespace. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in instruction list throughout. (arch_sh2a_up): Redefine to include fpu instruction set. Use instead of arch_sh2a in instruction list throughout. (arch_sh2e_up): Accomodate above changes. (arch_sh2_up): Ditto. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling. * sh-opc.h (arch_sh2a_nofpu): New. (arch_sh2a_up): New, defines sh2a and sh2a_nofpu. (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU instruction. 2004-01-20 DJ Delorie <dj@redhat.com> * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs. 2003-12-29 DJ Delorie <dj@redhat.com> * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up, sh_opcode_info, sh_table): Add sh2a support. (arch_op32): New, to tag 32-bit opcodes. * sh-dis.c (print_insn_sh): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * sh-opc.h (arch_sh2a): Add. * sh-dis.c (arch_sh2a): Handle. * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
2004-05-282004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-42/+117
bfd: * Makefile.am: Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh3_nommu . * bfd-in2.h: Regenerate. * cpu-sh.c: Add sh3-nommu architecture. (bfd_to_arch_table): Create new table. (sh_get_arch_from_bfd_mach): Create new function. (sh_get_arch_up_from_bfd_mach): Create new function. (sh_merge_bfd_arch): Create new function. * elf32-sh.c (sh_ef_bfd_table): Add table. (sh_elf_check_relocs): Replace switch statement with use of sh_ef_bfd_table . (sh_elf_get_flags_from_mach): Add new function. (sh_find_elf_flags): Likewise. (sh_elf_copy_private_data): Replace most of non-elf contents with a call to sh_merge_bfd_arch() . gas: * Makefile.am: Regenerate dependecies. * Makefile.in: Regenerate. * config/tc-sh.c (valid_arch): Make unsigned. (preset_target_arch): Likewise. (md_begin): Use new architecture flags system. (get_specific): Likewise. (assemble_ppi): Likewise. (md_assemble): Likewise. Also fix error check for bad opcodes. (md_parse_option): Likewise. Also generate -isa values according to the table in bfd/cpu-sh.c instead of just constants. Also allow <arch>-up ISA variants. (sh_elf_final_processing): Replace if-else chain with a call to sh_find_elf_flags(). * testsuite/gas/sh/arch: New directory. * testsuite/gas/sh/arch/arch.exp: New test script. * testsuite/gas/sh/arch/arch_expected.txt: New file. * testsuite/gas/sh/arch/sh.s: New file. * testsuite/gas/sh/arch/sh2.s: New file. * testsuite/gas/sh/arch/sh-dsp.s: New file. * testsuite/gas/sh/arch/sh2e.s: New file. * testsuite/gas/sh/arch/sh3-nommu.s: New file. * testsuite/gas/sh/arch/sh3.s: New file. * testsuite/gas/sh/arch/sh3-dsp.s: New file. * testsuite/gas/sh/arch/sh3e.s: New file. * testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/gas/sh/arch/sh4-nofpu.s: New file. * testsuite/gas/sh/arch/sh4.s: New file. * testsuite/gas/sh/arch/sh4a-nofpu.s: New file. * testsuite/gas/sh/arch/sh4al-dsp.s: New file. * testsuite/gas/sh/arch/sh4a.s: New file. include/elf: * sh.h (EF_SH_HAS_DSP): Remove. (EF_SH_HAS_FP): Remove. (EF_SH_MERGE_MACH): Remove. (EF_SH4_NOFPU): Convert to decimal. (EF_SH4A_NOFPU): Likewise. (EF_SH4_NOMMU_NOFPU): Likewise. (EF_SH3_NOMMU): Add new macro. (EF_SH_BFD_TABLE): Likewise. (sh_find_elf_flags): Add prototype. (sh_elf_get_flags_from_mach): Likewise. opcodes: * sh-dis.c (target_arch): Make unsigned. (print_insn_sh): Replace (most of) switch with a call to sh_get_arch_from_bfd_mach(). Also use new architecture flags system. * sh-opc.h: Redefine architecture flags values. Add sh3-nommu architecture. Reorganise <arch>_up macros so they make more visual sense. (SH_MERGE_ARCH_SET): Define new macro. (SH_VALID_BASE_ARCH_SET): Likewise. (SH_VALID_MMU_ARCH_SET): Likewise. (SH_VALID_CO_ARCH_SET): Likewise. (SH_VALID_ARCH_SET): Likewise. (SH_MERGE_ARCH_SET_VALID): Likewise. (SH_ARCH_SET_HAS_FPU): Likewise. (SH_ARCH_SET_HAS_DSP): Likewise. (SH_ARCH_UNKNOWN_ARCH): Likewise. (sh_get_arch_from_bfd_mach): Add prototype. (sh_get_arch_up_from_bfd_mach): Likewise. (sh_get_bfd_mach_from_arch_set): Likewise. (sh_merge_bfd_arc): Likewise. ld: * testsuite/ld-sh/arch/arch.exp: New test script. * testsuite/ld-sh/arch/arch_expected.txt: New file. * testsuite/ld-sh/arch/sh.s: New file. * testsuite/ld-sh/arch/sh2.s: New file. * testsuite/ld-sh/arch/sh-dsp.s: New file. * testsuite/ld-sh/arch/sh2e.s: New file. * testsuite/ld-sh/arch/sh3-nommu.s: New file. * testsuite/ld-sh/arch/sh3.s: New file. * testsuite/ld-sh/arch/sh3-dsp.s: New file. * testsuite/ld-sh/arch/sh3e.s: New file. * testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/ld-sh/arch/sh4-nofpu.s: New file. * testsuite/ld-sh/arch/sh4.s: New file. * testsuite/ld-sh/arch/sh4a-nofpu.s: New file. * testsuite/ld-sh/arch/sh4al-dsp.s: New file. * testsuite/ld-sh/arch/sh4a.s: New file.
2004-03-032003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-14/+24
opcodes: * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions accordingly. bfd: * archures.c: Add bfd_mach_sh4_nommu_nofpu. * cpu-sh.c: Ditto. * elf32-sh.c: Ditto. * bfd-in2.h: Regenerate. include/elf: * sh.h: Add EF_SH4_NOMMU_NOFPU. gas: * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. (sh_elf_final_processing): Output BFD type sh4_nofpu if that is the most general type or the user specifically requested it. (md_assemble): Add a new error message for when an instruction is understood, but is not allowed due to an -isa option.
2004-02-272004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-2/+2
* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. Also correct mistake in the comment.
2004-02-262004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-21/+23
gas: * tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01 nibble types to assembler. opcodes: * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to ensure that double registers have even numbers. Add REG_N_B01 for nn01 (binary 01) nibble to ensure that reserved instruction 0xfffd does not decode the same as 0xfdfd (ftrv). * sh-opc.h: Add REG_N_D nibble type and use it whereever REG_N refers to a double register. Add REG_N_B01 nibble type and use it instead of REG_NM in ftrv. Adjust the bit patterns in a few comments.
2004-01-282004-01-27 Michael Snyder <msnyder@redhat.com>Michael Snyder1-1/+1
* sh-opc.h (sh_table): "fsrra", not "fssra".
2003-12-052003-12-02 Alexandre Oliva <aoliva@redhat.com>Michael Snyder1-45/+147
* sh-opc.h: Add support for sh4a and no-fpu variants. * sh-dis.c: Ditto.
2003-01-23Add SH2E supportNick Clifton1-189/+198
2002-11-182002-11-18 Klee Dienes <kdienes@apple.com>Klee Dienes1-1/+1
* arc.h (arc_ext_opcodes): Declare as extern. (arc_ext_operands): Declare as extern. * i860.h (i860_opcodes): Declare as const. 2002-11-18 Klee Dienes <kdienes@apple.com> * arc-opc.c (arc_ext_opcodes): Define. (arc_ext_operands): Define. * i386-dis.c (Suffix3DNow): Declare as const. * arm-opc.h (arm_opcodes): Declare as const. (thumb_opcodes): Declare as const. * h8500-opc.h (h8500_table): Declare as const. (h8500_table): Use a NULL for the opcode in the terminator, so that code testing (opcode->name) behaves correctly. * mcore-opc.h (mcore_table): Declare as const. * sh-opc.h (sh_table): Declare as const. * w65-opc.h (optable): Declare as const. * z8k-opc.h (z8k_table): Declare as const.
2002-02-04* sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.Alexandre Oliva1-0/+1
2001-10-09fix encoding & decoding of DSP single data transfer instructionsNick Clifton1-12/+12
2001-06-09* sh-opc.h (sh_table): Don't use empty initializers.Alexandre Oliva1-1/+1
2001-06-04* sh-opc.h (sh_table): Complete last element entry to avoidAlexandre Oliva1-1/+1
compiler warning.
2001-03-13Fix typos in ChangeLogs; fix dates in copyright noticesNick Clifton1-1/+2
2000-11-11* sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.Alexandre Oliva1-1/+1
2000-04-05opcodes:Joern Rennecke1-11/+11
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs. stc GBR,@-<REG_N> is available for arch_sh1_up. Group parallel processing insn with identical mnemonics together. Make three-operand psha / pshl come first. gas: * config/tc-sh.c (get_operands): There's no third operand if the first operand is an immediate.
2000-04-05sh-dsp REPEAT support:Joern Rennecke1-35/+45
opcodes: * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (sh_arg_type): Add A_PC. (sh_table): Update entries using immediates. Add repeat. * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. gas: * config/tc-sh.c (immediate): Delete. (sh_operand_info): Add immediate member. (parse_reg): Use A_PC for pc. (parse_exp): Add second argument 'op'. All callers changed. (parse_at): Expect pc to be coded as A_PC. Use immediate field in *op. (insert): Add fourth argument 'op'. All callers changed. (build_relax): Add second argument 'op'. All callers changed. (insert_loop_bounds): New function. (build_Mytes): Remove DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (assemble_ppi): Use immediate field in *operand. (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL. include/coff: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define. include/elf: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. bfd: * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and BFD_RELOC_SH_LOOP_END. * elf32-sh.c (sh_elf_howto_tab): Change special_func to sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore. Add entries for R_SH_LOOP_START and R_SH_LOOP_END. (sh_elf_reloc_loop): New function. (sh_elf_reloc): No need to test for always-to-be-ignored relocs any more. (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}. (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}. * bfd-in2.h, libbfd.h: Regenerate.
2000-03-06 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.Joern Rennecke1-2/+2
2000-02-17bfd:Joern Rennecke1-239/+494
Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
1999-09-29Fix bit patterns of some load/store instructions to match latest docs.Nick Clifton1-8/+8
1999-09-07Add patterns with correct names for mulu and muls instructions (mulu.w and ↵Nick Clifton1-0/+2
muls.w)
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+573