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The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
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Note that opcodes is regenerated with cgen commit d1dd5fcc38e reverted,
due to failure of bpf to compile with that patch applied.
.../opcodes/bpf-opc.c:57:11: error: conversion from ‘long unsigned int’ to ‘unsigned int’ changes value from ‘18446744073709486335’ to ‘4294902015’ [-Werror=overflow]
57 | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
plus other similar errors.
cpu/
* mep.opc (print_tpreg, print_spreg): Delete unnecessary
forward declarations. Replace PTR with void *.
* mt.opc (print_dollarhex, print_pcrel): Delete forward decls.
opcodes/
* bpf-desc.c, * bpf-dis.c, * cris-desc.c,
* epiphany-desc.c, * epiphany-dis.c,
* fr30-desc.c, * fr30-dis.c, * frv-desc.c, * frv-dis.c,
* ip2k-desc.c, * ip2k-dis.c, * iq2000-desc.c, * iq2000-dis.c,
* lm32-desc.c, * lm32-dis.c, * m32c-desc.c, * m32c-dis.c,
* m32r-desc.c, * m32r-dis.c, * mep-desc.c, * mep-dis.c,
* mt-desc.c, * mt-dis.c, * or1k-desc.c, * or1k-dis.c,
* xc16x-desc.c, * xc16x-dis.c,
* xstormy16-desc.c, * xstormy16-dis.c: Regenerate.
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The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
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This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument
for @arch@_cgen_cpu_open. This is useful for architectures in
which the endianness of the instruction words is not the same
than the endianness used for data.
An accompanying patch has been sent to the CGEN mailing list that
adds support for this argument on the CGEN side [1]. Its been
already pre-approved [2], and will be applied simultaneously with
this binutils series.
[1] https://sourceware.org/pipermail/cgen/2020q2/002733.html
[2] https://sourceware.org/pipermail/cgen/2020q2/002737.html
include/ChangeLog:
2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
* opcode/cgen.h (enum cgen_cpu_open_arg): New value
CGEN_CPU_OPEN_INSN_ENDIAN.
opcodes/ChangeLog:
2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
* cgen-dis.in (cpu_desc_list): New field `insn_endian'.
(print_insn_): Handle instruction endian.
* bpf-dis.c: Regenerate.
* bpf-desc.c: Regenerate.
* epiphany-dis.c: Likewise.
* epiphany-desc.c: Likewise.
* fr30-dis.c: Likewise.
* fr30-desc.c: Likewise.
* frv-dis.c: Likewise.
* frv-desc.c: Likewise.
* ip2k-dis.c: Likewise.
* ip2k-desc.c: Likewise.
* iq2000-dis.c: Likewise.
* iq2000-desc.c: Likewise.
* lm32-dis.c: Likewise.
* lm32-desc.c: Likewise.
* m32c-dis.c: Likewise.
* m32c-desc.c: Likewise.
* m32r-dis.c: Likewise.
* m32r-desc.c: Likewise.
* mep-dis.c: Likewise.
* mep-desc.c: Likewise.
* mt-dis.c: Likewise.
* mt-desc.c: Likewise.
* or1k-dis.c: Likewise.
* or1k-desc.c: Likewise.
* xc16x-dis.c: Likewise.
* xc16x-desc.c: Likewise.
* xstormy16-dis.c: Likewise.
* xstormy16-desc.c: Likewise.
binutils/ChangeLog:
2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* objdump.c (disassemble_data): Set disasm_info.endian_code to
disasm_info.endian after the latter is initialized to the
endianness reported by BFD.
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cpu/
* mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
"if (x) free (x)" with "free (x)".
opcodes/
* arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
* sparc-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* xtensa-dis.c: Likewise.
* bpf-desc.c: Regenerate.
* epiphany-desc.c: Regenerate.
* fr30-desc.c: Regenerate.
* frv-desc.c: Regenerate.
* ip2k-desc.c: Regenerate.
* iq2000-desc.c: Regenerate.
* lm32-desc.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32r-desc.c: Regenerate.
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mt-desc.c: Regenerate.
* or1k-desc.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xstormy16-desc.c: Regenerate.
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Another patch aimed at making binutils comply with the GNU coding
standard. The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html
cpu/
* frv.opc: Include opintl.h.
(add_next_to_vliw): Use opcodes_error_handler to print error.
Standardize error message.
(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
* sysdep.h (opcodes_error_handler): Define.
(_bfd_error_handler): Declare.
* Makefile.am: Remove stray #.
* opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
EDIT" comment.
* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
opcodes_error_handler to print errors. Standardize error messages.
* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
and include opintl.h.
* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
* i386-gen.c: Standardize error messages.
* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
* Makefile.in: Regenerate.
* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
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* cgen.sh: Mark generated files read-only.
* epiphany-asm.c: Regenerate.
* epiphany-desc.c: Regenerate.
* epiphany-desc.h: Regenerate.
* epiphany-dis.c: Regenerate.
* epiphany-ibld.c: Regenerate.
* epiphany-opc.c: Regenerate.
* epiphany-opc.h: Regenerate.
* fr30-asm.c: Regenerate.
* fr30-desc.c: Regenerate.
* fr30-desc.h: Regenerate.
* fr30-dis.c: Regenerate.
* fr30-ibld.c: Regenerate.
* fr30-opc.c: Regenerate.
* fr30-opc.h: Regenerate.
* frv-asm.c: Regenerate.
* frv-desc.c: Regenerate.
* frv-desc.h: Regenerate.
* frv-dis.c: Regenerate.
* frv-ibld.c: Regenerate.
* frv-opc.c: Regenerate.
* frv-opc.h: Regenerate.
* ip2k-asm.c: Regenerate.
* ip2k-desc.c: Regenerate.
* ip2k-desc.h: Regenerate.
* ip2k-dis.c: Regenerate.
* ip2k-ibld.c: Regenerate.
* ip2k-opc.c: Regenerate.
* ip2k-opc.h: Regenerate.
* iq2000-asm.c: Regenerate.
* iq2000-desc.c: Regenerate.
* iq2000-desc.h: Regenerate.
* iq2000-dis.c: Regenerate.
* iq2000-ibld.c: Regenerate.
* iq2000-opc.c: Regenerate.
* iq2000-opc.h: Regenerate.
* lm32-asm.c: Regenerate.
* lm32-desc.c: Regenerate.
* lm32-desc.h: Regenerate.
* lm32-dis.c: Regenerate.
* lm32-ibld.c: Regenerate.
* lm32-opc.c: Regenerate.
* lm32-opc.h: Regenerate.
* lm32-opinst.c: Regenerate.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
* m32r-asm.c: Regenerate.
* m32r-desc.c: Regenerate.
* m32r-desc.h: Regenerate.
* m32r-dis.c: Regenerate.
* m32r-ibld.c: Regenerate.
* m32r-opc.c: Regenerate.
* m32r-opc.h: Regenerate.
* m32r-opinst.c: Regenerate.
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
* mt-asm.c: Regenerate.
* mt-desc.c: Regenerate.
* mt-desc.h: Regenerate.
* mt-dis.c: Regenerate.
* mt-ibld.c: Regenerate.
* mt-opc.c: Regenerate.
* mt-opc.h: Regenerate.
* or1k-asm.c: Regenerate.
* or1k-desc.c: Regenerate.
* or1k-desc.h: Regenerate.
* or1k-dis.c: Regenerate.
* or1k-ibld.c: Regenerate.
* or1k-opc.c: Regenerate.
* or1k-opc.h: Regenerate.
* or1k-opinst.c: Regenerate.
* xc16x-asm.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xc16x-desc.h: Regenerate.
* xc16x-dis.c: Regenerate.
* xc16x-ibld.c: Regenerate.
* xc16x-opc.c: Regenerate.
* xc16x-opc.h: Regenerate.
* xstormy16-asm.c: Regenerate.
* xstormy16-desc.c: Regenerate.
* xstormy16-desc.h: Regenerate.
* xstormy16-dis.c: Regenerate.
* xstormy16-ibld.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* xstormy16-opc.h: Regenerate.
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* epiphany-desc.c: Regenerate.
* fr30-desc.c: Regenerate.
* frv-desc.c: Regenerate.
* ip2k-desc.c: Regenerate.
* iq2000-desc.c: Regenerate.
* lm32-desc.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32r-desc.c: Regenerate.
* mep-desc.c: Regenerate.
* mt-desc.c: Regenerate.
* or1k-desc.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xstormy16-desc.c: Regenerate.
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Joern Rennecke <joern.rennecke@embecosm.com>
cpu:
* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
(testset-insn): Add NO_DIS attribute to t.l.
(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
(move-insns): Add NO-DIS attribute to cmov.l.
(op-mmr-movts): Add NO-DIS attribute to movts.l.
(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
(op-rrr): Add NO-DIS attribute to .l.
(shift-rrr): Add NO-DIS attribute to .l.
(op-shift-rri): Add NO-DIS attribute to i32.l.
(bitrl, movtl): Add NO-DIS attribute.
(op-iextrrr): Add NO-DIS attribute to .l
(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
opcodes:
* epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
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* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
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