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2016-11-22Fix spelling mistakes in comments in configure scriptsAmbrogino Modigliani1-1/+1
All changes are limited to comments, and no run-time behavior is affected. bfd/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * warning.m4: Fix spelling in comments. * configure.ac: Fix spelling in comments. * configure: Regenerate. binutils/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gdb/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure.ac: Fix spelling in comments. * configure: Regenerate. gas/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gold/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. gprof/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. ld/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate. opcodes/ChangeLog: 2016-11-22 Ambrogino Modigliani <ambrogino.modigliani@gmail.com> * configure: Regenerate.
2016-11-01Add support for RISC-V architecture.Nick Clifton1-0/+1
bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-09-26When building target binaries, ensure that the warning flags selected for ↵Vlad Zakharov1-6/+50
the command line match the target compiler. bfd * warning.m4 (AC_EGREP_CPP_FOR_BUILD): Introduce macro to verify CC_FOR_BUILD compiler. (AM_BINUTILS_WARNINGS): Introduce ac_cpp_for_build variable and add CC_FOR_BUILD compiler checks. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. binutils * Makefile.am: Replace AM_CLFAGS with AM_CFLAGS_FOR_BUILD when building with CC_FOR_BUILD compiler. * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gas * Makefile.in: Regenerate. * configure: Likewise. * doc/Makefile.in: Likewise. gold * Makefile.in: Regenerate. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof * Makefile.in: Regenerate. * configure: Likewise. ld * Makefile.in: Regenerate. * configure: Likewise. opcodes * Makefile.in: Regenerate. * configure: Likewise.
2016-07-21Set BFD_VERSION to 2.27.51H.J. Lu1-10/+10
bfd/ * version.m4 (BFD_VERSION): Set to 2.27.51. * configure: Regenerated. binutils/ * configure: Regenerated. gas/ * configure: Regenerated. gprof/ * configure: Regenerated. ld/ * configure: Regenerated. opcodes/ * configure: Regenerated.
2016-05-09Regenerate configureAlan Modra1-7/+10
2016-03-31enable -Wwrite-strings for gasTrevor Saunders1-2/+18
We add a new AC_SUBST to warning.m4 so that the test if the warning is supported is centralized, but the warning can be enabled per directory. binutils/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. gprof/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. ld/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. opcodes/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. bfd/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. * warning.m4: Add WARN_WRITE_STRINGS AC_SUBST. gold/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * configure: Regenerate. gas/ChangeLog: 2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * Makefile.am: Add WARN_WRITE_STRINGS to WARN_CFLAGS. * Makefile.in: Regenerate. * configure: Likewise.
2016-03-22Add -Wstack-usage to the gcc warning flags list, but only if using a ↵Nick Clifton1-1/+19
sufficiently recent version of gcc. bfd * warning.m4 (GCC_WARN_CFLAGS): Only add -Wstack-usage if using a sufficiently recent version of GCC. * configure: Regenerate. others * configure: Regenerate.
2016-03-21Remove use of alloca.Nick Clifton1-1/+1
bfd * warning.m4 (GCC_WARN_CFLAGS): Add -Wstack-usage=262144 * configure: Regenerate. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Replace use of alloca with call to xmalloc. * elf32-nds32.c: Likewise. * elf64-hppa.c: Likewise. * elfxx-mips.c: Likewise. * pef.c: Likewise. * pei-x86_64.c: Likewise. * som.c: Likewise. * xsym.c: Likewise. binutils * dlltool.c: Replace use of alloca with call to xmalloc. * dllwrap.c: Likewise. * nlmconv.c: Likewise. * objdump.c: Likewise. * resrc.c: Likewise. * winduni.c: Likewise. * configure: Regenerate. gas * atof-generic.c: Replace use of alloca with call to xmalloc. * cgen.c: Likewise. * dwarf2dbg.c: Likewise. * macro.c: Likewise. * remap.c: Likewise. * stabs.c: Likewise. * symbols.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/te-vms.c: Likewise. * configure: Regenerate. ld * emultempl/msp430.em: Replace use of alloca with call to xmalloc. * plugin.c: Likewise. * pe-dll.c: Likewise.
2016-01-17Regen configureAlan Modra1-1/+1
Picks up 2016-01-12 libtool.m4 change. bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2015-11-14Bump version to 2.26.51Tristan Gingold1-10/+10
bfd/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.51 * configure: Regenerate. binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2015-07-27Regenerate configure filesH.J. Lu1-2/+2
bfd/ * configure: Regenerated. binutils/ * configure: Regenerated. gas/ * configure: Regenerated. gold/ * configure: Regenerated. gprof/ * configure: Regenerated. ld/ * configure: Regenerated. opcodes/ * configure: Regenerated.
2015-07-14Sync config/warnings.m4 with GCCH.J. Lu1-0/+12
config/ Sync with GCC 2015-05-27 Jason Merrill <jason@redhat.com> PR bootstrap/66304 * warnings.m4 (ACX_PROG_CXX_WARNING_OPTS) (ACX_PROG_CXX_WARNINGS_ARE_ERRORS) (ACX_PROG_CXX_WARNING_ALMOST_PEDANTIC): New. (ACX_PROG_CC_WARNING_OPTS, ACX_PROG_CC_WARNING_ALMOST_PEDANTIC) (ACX_PROG_CC_WARNINGS_ARE_ERRORS): Push into C language context. libdecnumber/ * configure: Regenerated. libiberty/ * configure: Regenerated. opcodes/ * configure: Regenerated.
2015-05-11Add Intel MCU support to opcodesH.J. Lu1-1/+1
* configure.ac: Support bfd_iamcu_arch. * disassemble.c (disassembler): Support bfd_iamcu_arch. * i386-gen.c (cpu_flag_init): Add CPU_IAMCU_FLAGS and CPU_IAMCU_COMPAT_FLAGS. (cpu_flags): Add CpuIAMCU. * i386-opc.h (CpuIAMCU): New. (i386_cpu_flags): Add cpuiamcu. * configure: Regenerated. * i386-init.h: Likewise. * i386-tbl.h: Likewise.
2015-01-28FT32 initial supportAlan Modra1-0/+1
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2014-12-06Add Visium support to opcodesEric Botcazou1-0/+1
include/ * dis-asm.h (print_insn_visium): Declare. include/opcode/ * visium.h: New file. opcodes/ * configure.ac: Add Visium support. * configure: Regenerate. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and visium-opc.c. * Makefile.in: Regenerate. * disassemble.c (ARCH_visium): Define if ARCH_all. (disassembler): Deal with bfd_arch_visium if ARCH_visium. * visium-dis.c: New file. * visium-opc.c: Likewise. * po/POTFILES.in: Regenerate.
2014-11-24Update libtool.m4 from GCC trunkH.J. Lu1-2/+2
* libtool.m4: Updated from GCC trunk. bfd/ * configure: Regenerated. binutils/ * configure: Regenerated. gas/ * configure: Regenerated. gprof/ * configure: Regenerated. ld/ * configure: Regenerated. opcodes/ * configure: Regenerated.
2014-10-15Bump bfd version.Tristan Gingold1-10/+10
bfd/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.25.51 * configure: Regenerate. binutils/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2014-07-04Use modern AC_INIT in configure.inAlan Modra1-24/+21
This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all binutils configure.in files. The BFD version is now in bfd/version.m4 rather than bfd/configure.in, which allows automake to automatically track this dependency. bfd/ * version.m4: New file. * configure.in: Include version.m4. (AC_INIT): Update. * Makefile.am (RELEASE): Delete. (bfdver.h): Depend on development.sh, use instead of RELEASE. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. opcodes/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. binutils/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gas/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * configure.com: Get bfd version from bfd/version.m4. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. ld/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate.
2014-06-05Make it easy to make --disable-werror the default for both binutils and gdbJoel Brobecker1-2/+5
The goal of this patch is to provide an easy way to make --disable-werror the default when building binutils, or the parts of binutils that need to get built when building GDB. In development mode, we want to continue making -Werror the default with GCC. But, when making releases, I think we want to make it as easy as possible for regular users to successfully build from sources. GDB already has this kind of feature to turn -Werror as well as the use of the libmcheck library. As GDB Release Manager, I take advantage of it to turn those off after having cut the branch. I'd like to be able to do the same for the binutils bits. And perhaps Tristan will want to do the same for his releases too (not sure, binutils builders might be a little savvier than GDB builders). This patch introduces a new file, called development.sh, which just sets a variable called $development. In our development branches (Eg. "master"), it's set to true. But setting it to false would allow us to change the default behavior of various development-related features to be turned off; in this case, it turns off the use of -Werror by default (use --enable-werror to turn it back on). bfd/ChangeLog: * development.sh: New file. * warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh. Make -Werror the default with GCC only if DEVELOPMENT is true. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add $(srcdir)/development.sh. * Makefile.in, configure: Regenerate. binutils/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gas/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gold/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): New. * Makefile.in, configure: Regenerate. gprof/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. ld/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. opcodes/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gdb/ChangeLog: * development.sh: Delete. * Makefile.in (config.status): Adjust dependency on development.sh. * configure.ac: Adjust development.sh source call. * configure: Regenerate. gdb/gdbserver/ChangeLog: * configure.ac: Adjust development.sh source call. * Makefile.in (config.status): Adjust dependency on development.sh. * configure: Regenerate. Tested on x86_64-linux by building two ways: One with DEVELOPMENT set to true, and one with DEVELOPMENT set to false. In the first case, I could see the use of -Werror, while it disappeared in the second case.
2014-05-02Use sigsetjmp/siglongjmp in opcodesH.J. Lu1-0/+35
sigsetjmp/siglongjmp without saving the signal mask is faster than setjmp/longjmp on systems where the signal mask is saved. This patch uses sigsetjmp/siglongjmp without saving the signal mask if possible. PR binutils/16886 * config.in: Regenerated. * configure: Likewise. * configure.in: Check if sigsetjmp is available. * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP. * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn): Replace setjmp with OPCODES_SIGSETJMP. * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP. * sysdep.h (OPCODES_SIGJMP_BUF): New macro. (OPCODES_SIGSETJMP): Likewise. (OPCODES_SIGLONGJMP): Likewise. * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP. * xtensa-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP. * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson1-2/+1
with support for the new or1k configuration.
2013-12-13Add support for Andes NDS32:Kuan-Lin Chen1-0/+1
BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
2013-09-20 * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonicalAlan Modra1-5/+11
ppc host match. Support little-endian powerpc linux hosts. Regenerate binutils configure files.
2013-06-21 * msp430-decode.opc: New.Nick Clifton1-1/+1
* msp430-decode.c: New/generated. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add msp430-decode.c. (MAINTAINER_CLEANFILES): Likewise. Add rule to build msp430-decode.c frommsp430decode.opc using the opc2c program. * Makefile.in: Regenerate. * configure.in: Add msp430-decode.lo to msp430 architecture files. * configure: Regenerate. * msp430-decode.h: New.
2013-02-062013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore1-0/+1
Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers.
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton1-0/+1
* metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2012-11-092012-11-09 Nick Clifton <nickc@redhat.com>Nick Clifton1-0/+1
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise.
2012-09-15 * configure: Regenerate.David Edelsohn1-2/+3
2012-09-10Regenerate binutils configureH.J. Lu1-6/+13
bfd/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated. binutils/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated. etc/ 2010-11-20 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> * Makefile.in (install-strip): New target. gas/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated. gold/ 2012-09-09 Alan Modra <amodra@gmail.com> * target.h (Target::gc_mark_symbol, do_gc_mark_symbol): New functions. gprof/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated. intl/ 2010-06-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> PR bootstrap/44621 ld/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated. libiberty/ 2011-08-28 H.J. Lu <hongjiu.lu@intel.com> * argv.c (dupargv): Replace malloc with xmalloc. Don't check opcodes/ 2012-09-10 H.J. Lu <hongjiu.lu@intel.com> * configure: Regenerated.
2012-08-17 * po/vi.po: Updated Vietnamese translation.Nick Clifton1-1/+1
* po/uk.po: New Ukranian translation. * configure.in (ALL_LINGUAS): Add uk. * configure: Regenerate.
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+1
2012-08-13 include/opcode/Maciej W. Rozycki1-2/+48
* mips.h (mips_opcode): Add the exclusions field. (OPCODE_IS_MEMBER): Remove macro. (cpu_is_member): New inline function. (opcode_is_member): Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Update comment. * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor instructions for IOCT as appropriate. * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with opcode_is_member. * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with the result of a check for the -Wno-missing-field-initializers GCC option. * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable. (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to compilation. (mips16-opc.lo): Likewise. (micromips-opc.lo): Likewise. * aclocal.m4: Regenerate. * configure: Regenerate. * Makefile.in: Regenerate. gas/ * config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros. (is_opcode_valid): Remove coprocessor instruction exclusions. Replace OPCODE_IS_MEMBER with opcode_is_member. (is_opcode_valid_16): Replace OPCODE_IS_MEMBER with opcode_is_member. (macro): Remove coprocessor instruction exclusions.
2012-08-02 * configure.in: Formatting.Jan-Benedict Glaw1-11/+11
* configure: Regenerate.
2012-08-01 * h8300-dis.c: Fix printf arg warnings.Alan Modra1-2/+2
* i960-dis.c: Likewise. * mips-dis.c: Likewise. * pdp11-dis.c: Likewise. * sh-dis.c: Likewise. * v850-dis.c: Likewise. * configure.in: Formatting. * configure: Regenerate. * rl78-decode.c: Regenerate. * po/POTFILES.in: Regenerate.
2012-07-27bfd: update to AC_INITMike Frysinger1-1/+1
Move the package name/version from AM_INIT_AUTOMAKE to AC_INIT per recent autotools guidelines. We use recent versions of both, so it shouldn't be a problem. This sets PACKAGE_xxx variables correctly, and makes the output of: ./configure --version actually useful: bfd configure 2.22.52 Changing the other dirs to use AC_INIT would require a bit of m4 trickery that I don't feel like getting into, and they all use BFD_VERSION anyways, so there isn't much point. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-05-17 PR 14072Nick Clifton1-1/+4
* configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * alpha-opc.c: Include sysdep.h before any other header file. * alpha-dis.c: Likewise. * avr-dis.c: Likewise. * cgen-opc.c: Likewise. * cr16-dis.c: Likewise. * cris-dis.c: Likewise. * crx-dis.c: Likewise. * d10v-dis.c: Likewise. * d10v-opc.c: Likewise. * d30v-dis.c: Likewise. * d30v-opc.c: Likewise. * h8500-dis.c: Likewise. * i370-dis.c: Likewise. * i370-opc.c: Likewise. * m10200-dis.c: Likewise. * m10300-dis.c: Likewise. * micromips-opc.c: Likewise. * mips-opc.c: Likewise. * mips61-opc.c: Likewise. * moxie-dis.c: Likewise. * or32-opc.c: Likewise. * pj-dis.c: Likewise. * ppc-dis.c: Likewise. * ppc-opc.c: Likewise. * s390-dis.c: Likewise. * sh-dis.c: Likewise. * sh64-dis.c: Likewise. * sparc-dis.c: Likewise. * sparc-opc.c: Likewise. * spu-dis.c: Likewise. * tic30-dis.c: Likewise. * tic54x-dis.c: Likewise. * tic80-dis.c: Likewise. * tic80-opc.c: Likewise. * tilegx-dis.c: Likewise. * tilepro-dis.c: Likewise. * v850-dis.c: Likewise. * v850-opc.c: Likewise. * vax-dis.c: Likewise. * w65-dis.c: Likewise. * xgate-dis.c: Likewise. * xtensa-dis.c: Likewise. * rl78-decode.opc: Likewise. * rl78-decode.c: Regenerate. * rx-decode.opc: Likewise. * rx-decode.c: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * bfd-in.h: Generate an error if included before config.h. * sysdep.h: Likewise. * bfd-in2.h: Regenerate. * compress.c: Remove #include "config.h". * plugin.c: Likewise. * elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h. * elf64-hppa.c: Likewise. * som.c: Likewise. * xsymc.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * Makefile.am: Use wrappers around C files generated by flex. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * itbl-lex-wrapper.c: New file. * config/bfin-lex-wrapper.c: New file. * cgen.c: Include as.h before setjmp.h. * config/tc-dlx.c: Include as.h before any other header. * config/tc-h8300.c: Likewise. * config/tc-lm32.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-or32.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * unwind-ia64.h: Include config.h.
2012-05-15 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.Nick Clifton1-0/+2
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-11 PR binutils/14028Nick Clifton1-0/+32
* configure.in: Invoke ACX_HEADER_STRING. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: If STRINGS_WITH_STRING is defined then include both string.h and strings.h.
2012-05-03Add support for Motorola XGATE embedded CPUNick Clifton1-1/+2
2011-11-02 * po/it.po: New Italian translation.Nick Clifton1-1/+1
* configure.in (ALL_LINGUAS): Add it. * configure: Regenerate. * po/opcodes.pot: Regenerate.
2011-11-02[.]DJ Delorie1-0/+1
* configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-10-25bfd:Nick Clifton1-0/+1
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-07-24bfd/Richard Sandiford1-1/+1
2011-02-25 Chao-ying Fu <fu@mips.com> Ilie Garbacea <ilie@mips.com> Maciej W. Rozycki <macro@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Catherine Moore <clm@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * archures.c (bfd_mach_mips_micromips): New macro. * cpu-mips.c (I_micromips): New enum value. (arch_info_struct): Add bfd_mach_mips_micromips. * elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New prototype. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (gprel16_reloc_p): Handle microMIPS ASE. (literal_reloc_p): New function. * elf32-mips.c (elf_micromips_howto_table_rel): New variable. (_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (mips_elf_gprel32_reloc): Update comment. (micromips_reloc_map): New variable. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (mips_elf32_rtype_to_howto): Likewise. (mips_info_to_howto_rel): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. (bfd_elf32_bfd_relax_section): Likewise. * elf64-mips.c (micromips_elf64_howto_table_rel): New variable. (micromips_elf64_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf64_bfd_reloc_name_lookup): Likewise. (mips_elf64_rtype_to_howto): Likewise. (bfd_elf64_bfd_is_target_special_symbol): Define. * elfn32-mips.c (elf_micromips_howto_table_rel): New variable. (elf_micromips_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (mips_elf_n32_rtype_to_howto): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. * elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro. (LA25_LUI_MICROMIPS_2): Likewise. (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise. (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise. (TLS_RELOC_P): Handle microMIPS ASE. (mips_elf_create_stub_symbol): Adjust value of stub symbol if target is a microMIPS function. (micromips_reloc_p): New function. (micromips_reloc_shuffle_p): Likewise. (got16_reloc_p, call16_reloc_p): Handle microMIPS ASE. (got_disp_reloc_p, got_page_reloc_p): New functions. (got_ofst_reloc_p): Likewise. (got_hi16_reloc_p, got_lo16_reloc_p): Likewise. (call_hi16_reloc_p, call_lo16_reloc_p): Likewise. (hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE. (micromips_branch_reloc_p): New function. (tls_gd_reloc_p, tls_ldm_reloc_p): Likewise. (tls_gottprel_reloc_p): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE. (mips_tls_got_index, mips_elf_got_page): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_relocation_needs_la25_stub): Likewise. (mips_elf_calculate_relocation): Likewise. (mips_elf_perform_relocation): Likewise. (_bfd_mips_elf_symbol_processing): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_link_output_symbol_hook): Likewise. (mips_elf_add_lo16_rel_addend): Likewise. (_bfd_mips_elf_check_relocs): Likewise. (mips_elf_adjust_addend): Likewise. (_bfd_mips_elf_relocate_section): Likewise. (mips_elf_create_la25_stub): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_elf_gc_sweep_hook): Likewise. (_bfd_mips_elf_is_target_special_symbol): New function. (mips_elf_relax_delete_bytes): Likewise. (opcode_descriptor): New structure. (RA): New macro. (OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise. (b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables. (beq_insn_32): Likewise. (b_insn_16, bz_insn_16): New variables. (BZC32_REG_FIELD): New macro. (bz_rs_insns_32, bz_rt_insns_32): New variables. (bzc_insns_32, bz_insns_16):Likewise. (BZ16_REG, BZ16_REG_FIELD): New macros. (jal_insn_32_bd16, jal_insn_32_bd32): New variables. (jal_x_insn_32_bd32): Likewise. (j_insn_32, jalr_insn_32): Likewise. (ds_insns_32_bd16, ds_insns_32_bd32): Likewise. (jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise. (JR16_REG): New macro. (ds_insns_16_bd16): New variable. (lui_insn): Likewise. (addiu_insn, addiupc_insn): Likewise. (ADDIUPC_REG_FIELD): New macro. (MOVE32_RD, MOVE32_RS): Likewise. (MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise. (move_insns_32, move_insns_16): New variables. (nop_insn_32, nop_insn_16): Likewise. (MATCH): New macro. (find_match): New function. (check_br16_dslot, check_br32_dslot): Likewise. (check_br16, check_br32): Likewise. (IS_BITSIZE): New macro. (check_4byte_branch): New function. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16 and microMIPS modules together. (_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE. * reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation. (BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_GPREL16): Likewise. (BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise. (BFD_RELOC_MICROMIPS_HI16_S): Likewise. (BFD_RELOC_MICROMIPS_LO16): Likewise. (BFD_RELOC_MICROMIPS_LITERAL): Likewise. (BFD_RELOC_MICROMIPS_GOT16): Likewise. (BFD_RELOC_MICROMIPS_CALL16): Likewise. (BFD_RELOC_MICROMIPS_GOT_HI16): Likewise. (BFD_RELOC_MICROMIPS_GOT_LO16): Likewise. (BFD_RELOC_MICROMIPS_CALL_HI16): Likewise. (BFD_RELOC_MICROMIPS_CALL_LO16): Likewise. (BFD_RELOC_MICROMIPS_SUB): Likewise. (BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise. (BFD_RELOC_MICROMIPS_GOT_OFST): Likewise. (BFD_RELOC_MICROMIPS_GOT_DISP): Likewise. (BFD_RELOC_MICROMIPS_HIGHEST): Likewise. (BFD_RELOC_MICROMIPS_HIGHER): Likewise. (BFD_RELOC_MICROMIPS_SCN_DISP): Likewise. (BFD_RELOC_MICROMIPS_JALR): Likewise. (BFD_RELOC_MICROMIPS_TLS_GD): Likewise. (BFD_RELOC_MICROMIPS_TLS_LDM): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise. (BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. binutils/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * readelf.c (get_machine_flags): Handle microMIPS ASE. (get_mips_symbol_other): Likewise. gas/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.h (mips_segment_info): Add one bit for microMIPS. (TC_LABEL_IS_LOCAL): New macro. (mips_label_is_local): New prototype. * config/tc-mips.c (S0, S7): New macros. (emit_branch_likely_macro): New variable. (mips_set_options): Add micromips. (mips_opts): Initialise micromips to -1. (file_ase_micromips): New variable. (CPU_HAS_MICROMIPS): New macro. (hilo_interlocks): Set for microMIPS too. (gpr_interlocks): Likewise. (cop_interlocks): Likewise. (cop_mem_interlocks): Likewise. (HAVE_CODE_COMPRESSION): New macro. (micromips_op_hash): New variable. (micromips_nop16_insn, micromips_nop32_insn): New variables. (NOP_INSN): Handle microMIPS ASE. (mips32_to_micromips_reg_b_map): New macro. (mips32_to_micromips_reg_c_map): Likewise. (mips32_to_micromips_reg_d_map): Likewise. (mips32_to_micromips_reg_e_map): Likewise. (mips32_to_micromips_reg_f_map): Likewise. (mips32_to_micromips_reg_g_map): Likewise. (mips32_to_micromips_reg_l_map): Likewise. (mips32_to_micromips_reg_n_map): Likewise. (mips32_to_micromips_reg_h_map): New variable. (mips32_to_micromips_reg_m_map): Likewise. (mips32_to_micromips_reg_q_map): Likewise. (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_to_32_reg_b_map): New macro. (micromips_to_32_reg_c_map): Likewise. (micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map): Likewise. (micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map): Likewise. (micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_n_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): New macros. (RELAX_DELAY_SLOT_16BIT): New macro. (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise. (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise. (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros. (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise. (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise. (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise. (RELAX_MICROMIPS_TOOFAR32): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise. (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE. (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p, fsize and insns. (mips_mark_labels): New function. (mips16_small, mips16_ext): Remove variables, replacing with... (forced_insn_size): ... this. (append_insn, mips16_ip): Update accordingly. (micromips_insn_length): New function. (insn_length): Return the length of microMIPS instructions. (mips_record_mips16_mode): Rename to... (mips_record_compressed_mode): ... this. Handle microMIPS ASE. (install_insn): Handle microMIPS ASE. (reglist_lookup): New function. (is_size_valid, is_delay_slot_valid): Likewise. (md_begin): Handle microMIPS ASE. (md_assemble): Likewise. Update for append_insn interface change. (micromips_reloc_p): New function. (got16_reloc_p): Handle microMIPS ASE. (hi16_reloc_p): Likewise. (lo16_reloc_p): Likewise. (jmp_reloc_p): New function. (jalr_reloc_p): Likewise. (matching_lo_reloc): Handle microMIPS ASE. (insn_uses_reg, reg_needs_delay): Likewise. (mips_move_labels): Likewise. (mips16_mark_labels): Rename to... (mips_compressed_mark_labels): ... this. Handle microMIPS ASE. (gpr_mod_mask): New function. (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE. (fpr_read_mask, fpr_write_mask): Likewise. (insns_between, nops_for_vr4130, nops_for_insn): Likewise. (fix_loongson2f_nop, fix_loongson2f_jump): Likewise. (MICROMIPS_LABEL_CHAR): New macro. (micromips_target_label, micromips_target_name): New variables. (micromips_label_name, micromips_label_expr): New functions. (micromips_label_inc, micromips_add_label): Likewise. (mips_label_is_local): Likewise. (micromips_map_reloc): Likewise. (can_swap_branch_p): Handle microMIPS ASE. (append_insn): Add expansionp argument. Handle microMIPS ASE. (start_noreorder, end_noreorder): Handle microMIPS ASE. (macro_start, macro_warning, macro_end): Likewise. (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables. (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise. (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros. (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise. (macro_build): Handle microMIPS ASE. Update for append_insn interface change. (mips16_macro_build): Update for append_insn interface change. (macro_build_jalr): Handle microMIPS ASE. (macro_build_lui): Likewise. Simplify. (load_register): Handle microMIPS ASE. (load_address): Likewise. (move_register): Likewise. (macro_build_branch_likely): New function. (macro_build_branch_ccl): Likewise. (macro_build_branch_rs): Likewise. (macro_build_branch_rsrt): Likewise. (macro): Handle microMIPS ASE. (validate_micromips_insn): New function. (expr_const_in_range): Likewise. (mips_ip): Handle microMIPS ASE. (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (md_longopts): Add mmicromips and mno-micromips. (md_parse_option): Handle OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (mips_after_parse_args): Handle microMIPS ASE. (md_pcrel_from): Handle microMIPS relocations. (mips_force_relocation): Likewise. (md_apply_fix): Likewise. (mips_align): Handle microMIPS ASE. (s_mipsset): Likewise. (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers. (s_dtprel_internal): Likewise. (s_gpword, s_gpdword): Likewise. (s_insn): Handle microMIPS ASE. (s_mips_stab): Likewise. (relaxed_micromips_32bit_branch_length): New function. (relaxed_micromips_16bit_branch_length): New function. (md_estimate_size_before_relax): Handle microMIPS ASE. (mips_fix_adjustable): Likewise. (tc_gen_reloc): Handle microMIPS relocations. (mips_relax_frag): Handle microMIPS ASE. (md_convert_frag): Likewise. (mips_frob_file_after_relocs): Likewise. (mips_elf_final_processing): Likewise. (mips_nop_opcode): Likewise. (mips_handle_align): Likewise. (md_show_usage): Handle microMIPS options. * symbols.c (TC_LABEL_IS_LOCAL): New macro. (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check. * doc/as.texinfo (Target MIPS options): Add -mmicromips and -mno-micromips. (-mmicromips, -mno-micromips): New options. * doc/c-mips.texi (-mmicromips, -mno-micromips): New options. (MIPS ISA): Document .set micromips and .set nomicromips. (MIPS insn): Update for microMIPS support. gas/testsuite/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * gas/mips/micromips.d: New test. * gas/mips/micromips-branch-delay.d: Likewise. * gas/mips/micromips-branch-relax.d: Likewise. * gas/mips/micromips-branch-relax-pic.d: Likewise. * gas/mips/micromips-size-1.d: Likewise. * gas/mips/micromips-trap.d: Likewise. * gas/mips/micromips.l: New stderr output. * gas/mips/micromips-branch-delay.l: Likewise. * gas/mips/micromips-branch-relax.l: Likewise. * gas/mips/micromips-branch-relax-pic.l: Likewise. * gas/mips/micromips-size-0.l: New list test. * gas/mips/micromips-size-1.l: New stderr output. * gas/mips/micromips.s: New test source. * gas/mips/micromips-branch-delay.s: Likewise. * gas/mips/micromips-branch-relax.s: Likewise. * gas/mips/micromips-size-0.s: Likewise. * gas/mips/micromips-size-1.s: Likewise. * gas/mips/mips.exp: Run the new tests. * gas/mips/dli.s: Use .p2align. * gas/mips/elf_ase_micromips.d: New test. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/micromips@abs.d: Likewise. * gas/mips/micromips@add.d: Likewise. * gas/mips/micromips@alnv_ps-swap.d: Likewise. * gas/mips/micromips@and.d: Likewise. * gas/mips/micromips@beq.d: Likewise. * gas/mips/micromips@bge.d: Likewise. * gas/mips/micromips@bgeu.d: Likewise. * gas/mips/micromips@blt.d: Likewise. * gas/mips/micromips@bltu.d: Likewise. * gas/mips/micromips@branch-likely.d: Likewise. * gas/mips/micromips@branch-misc-1.d: Likewise. * gas/mips/micromips@branch-misc-2-64.d: Likewise. * gas/mips/micromips@branch-misc-2.d: Likewise. * gas/mips/micromips@branch-misc-2pic-64.d: Likewise. * gas/mips/micromips@branch-misc-2pic.d: Likewise. * gas/mips/micromips@branch-misc-4-64.d: Likewise. * gas/mips/micromips@branch-misc-4.d: Likewise. * gas/mips/micromips@branch-self.d: Likewise. * gas/mips/micromips@cache.d: Likewise. * gas/mips/micromips@daddi.d: Likewise. * gas/mips/micromips@dli.d: Likewise. * gas/mips/micromips@elf-jal.d: Likewise. * gas/mips/micromips@elf-rel2.d: Likewise. * gas/mips/micromips@elfel-rel2.d: Likewise. * gas/mips/micromips@elf-rel4.d: Likewise. * gas/mips/micromips@jal-svr4pic.d: Likewise. * gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise. * gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise. * gas/mips/micromips@li.d: Likewise. * gas/mips/micromips@loc-swap-dis.d: Likewise. * gas/mips/micromips@loc-swap.d: Likewise. * gas/mips/micromips@mips1-fp.d: Likewise. * gas/mips/micromips@mips32-cp2.d: Likewise. * gas/mips/micromips@mips32-imm.d: Likewise. * gas/mips/micromips@mips32-sf32.d: Likewise. * gas/mips/micromips@mips32.d: Likewise. * gas/mips/micromips@mips32r2-cp2.d: Likewise. * gas/mips/micromips@mips32r2-fp32.d: Likewise. * gas/mips/micromips@mips32r2-sync.d: Likewise. * gas/mips/micromips@mips32r2.d: Likewise. * gas/mips/micromips@mips4-branch-likely.d: Likewise. * gas/mips/micromips@mips4-fp.d: Likewise. * gas/mips/micromips@mips4.d: Likewise. * gas/mips/micromips@mips5.d: Likewise. * gas/mips/micromips@mips64-cp2.d: Likewise. * gas/mips/micromips@mips64.d: Likewise. * gas/mips/micromips@mips64r2.d: Likewise. * gas/mips/micromips@pref.d: Likewise. * gas/mips/micromips@relax-at.d: Likewise. * gas/mips/micromips@relax.d: Likewise. * gas/mips/micromips@rol-hw.d: Likewise. * gas/mips/micromips@uld2-eb.d: Likewise. * gas/mips/micromips@uld2-el.d: Likewise. * gas/mips/micromips@ulh2-eb.d: Likewise. * gas/mips/micromips@ulh2-el.d: Likewise. * gas/mips/micromips@ulw2-eb-ilocks.d: Likewise. * gas/mips/micromips@ulw2-el-ilocks.d: Likewise. * gas/mips/cache.d: Likewise. * gas/mips/daddi.d: Likewise. * gas/mips/mips32-imm.d: Likewise. * gas/mips/pref.d: Likewise. * gas/mips/elf-rel27.d: Handle microMIPS ASE. * gas/mips/l_d.d: Likewise. * gas/mips/l_d-n32.d: Likewise. * gas/mips/l_d-n64.d: Likewise. * gas/mips/ld.d: Likewise. * gas/mips/ld-n32.d: Likewise. * gas/mips/ld-n64.d: Likewise. * gas/mips/s_d.d: Likewise. * gas/mips/s_d-n32.d: Likewise. * gas/mips/s_d-n64.d: Likewise. * gas/mips/sd.d: Likewise. * gas/mips/sd-n32.d: Likewise. * gas/mips/sd-n64.d: Likewise. * gas/mips/mips32.d: Update immediates. * gas/mips/micromips@mips32-cp2.s: New test source. * gas/mips/micromips@mips32-imm.s: Likewise. * gas/mips/micromips@mips32r2-cp2.s: Likewise. * gas/mips/micromips@mips64-cp2.s: Likewise. * gas/mips/cache.s: Likewise. * gas/mips/daddi.s: Likewise. * gas/mips/mips32-imm.s: Likewise. * gas/mips/elf-rel4.s: Handle microMIPS ASE. * gas/mips/lb-pic.s: Likewise. * gas/mips/ld.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips.exp: Add the micromips arch. Exclude mips16e from micromips. Run mips32-imm. * gas/mips/jal-mask-11.d: New test. * gas/mips/jal-mask-12.d: Likewise. * gas/mips/micromips@jal-mask-11.d: Likewise. * gas/mips/jal-mask-1.s: Source for the new tests. * gas/mips/jal-mask-21.d: New test. * gas/mips/jal-mask-22.d: Likewise. * gas/mips/micromips@jal-mask-12.d: Likewise. * gas/mips/jal-mask-2.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * gas/mips/mips16-e.d: Add --special-syms to `objdump'. * gas/mips/tmips16-e.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/and.s: Adjust padding. * gas/mips/beq.s: Likewise. * gas/mips/bge.s: Likewise. * gas/mips/bgeu.s: Likewise. * gas/mips/blt.s: Likewise. * gas/mips/bltu.s: Likewise. * gas/mips/branch-misc-2.s: Likewise. * gas/mips/jal.s: Likewise. * gas/mips/li.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/mips4-fp.s: Likewise. * gas/mips/relax.s: Likewise. * gas/mips/and.d: Update accordingly. * gas/mips/elf-jal.d: Likewise. * gas/mips/jal.d: Likewise. * gas/mips/li.d: Likewise. * gas/mips/relax-at.d: Likewise. * gas/mips/relax.d: Likewise. include/elf/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (R_MICROMIPS_min): New relocations. (R_MICROMIPS_26_S1): Likewise. (R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise. (R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise. (R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise. (R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise. (R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise. (R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise. (R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise. (R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise. (R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise. (R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise. (R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise. (R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise. (R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise. (R_MICROMIPS_TLS_GOTTPREL): Likewise. (R_MICROMIPS_TLS_TPREL_HI16): Likewise. (R_MICROMIPS_TLS_TPREL_LO16): Likewise. (R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise. (R_MICROMIPS_max): Likewise. (EF_MIPS_ARCH_ASE_MICROMIPS): New macro. (STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise. (ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise. (STO_MICROMIPS): Likewise. (ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise. (ELF_ST_IS_COMPRESSED): Likewise. (STO_MIPS_PLT, STO_MIPS_PIC): Rework. (ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise. (STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise. include/opcode/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. (OP_MASK_CODE10, OP_SH_CODE10): Likewise. (OP_MASK_TRAP, OP_SH_TRAP): Likewise. (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise. (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise. (OP_MASK_RS3, OP_SH_RS3): Likewise. (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise. (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise. (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise. (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise. (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise. (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise. (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise. (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise. (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise. (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise. (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise. (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise. (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise. (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise. (INSN_WRITE_GPR_S): New macro. (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise. (INSN2_READ_FPR_D): Likewise. (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise. (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise. (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise. (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise. (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise. (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise. (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise. (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise. (CPU_MICROMIPS): New macro. (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values. (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise. (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise. (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise. (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise. (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise. (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise. (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise. (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise. (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise. (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise. (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise. (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise. (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros. (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise. (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise. (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise. (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise. (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise. (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise. (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise. (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise. (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise. (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise. (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise. (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise. (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise. (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise. (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise. (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise. (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise. (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise. (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise. (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise. (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise. (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise. (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise. (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise. (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise. (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise. (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise. (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise. (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise. (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise. (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise. (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise. (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise. (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise. (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise. (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise. (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise. (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise. (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise. (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise. (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise. (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise. (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise. (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise. (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise. (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise. (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise. (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise. (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise. (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise. (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise. (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise. (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise. (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise. (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise. (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise. (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise. (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise. (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise. (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise. (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise. (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise. (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise. (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise. (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise. (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise. (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise. (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise. (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise. (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise. (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise. (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise. (micromips_opcodes): New declaration. (bfd_micromips_num_opcodes): Likewise. ld/testsuite/ 2011-02-25 Catherine Moore <clm@codesourcery.com> Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * lib/ld-lib.exp (run_dump_test): Support distinct assembler flags for the same source named multiple times. * ld-mips-elf/jalx-1.s: New test source. * ld-mips-elf/jalx-1.d: New test output. * ld-mips-elf/jalx-1.ld: New test linker script. * ld-mips-elf/jalx-2-main.s: New test source. * ld-mips-elf/jalx-2-ex.s: Likewise. * ld-mips-elf/jalx-2-printf.s: Likewise. * ld-mips-elf/jalx-2.dd: New test output. * ld-mips-elf/jalx-2.ld: New test linker script. * ld-mips-elf/mips16-and-micromips.d: New test. * ld-mips-elf/mips-elf.exp: Run the new tests opcodes/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * micromips-opc.c: New file. * mips-dis.c (micromips_to_32_reg_b_map): New array. (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): Likewise. (micromips_ase): New variable. (is_micromips): New function. (set_default_mips_dis_options): Handle microMIPS ASE. (print_insn_micromips): New function. (is_compressed_mode_p): Likewise. (_print_insn_mips): Handle microMIPS instructions. * Makefile.am (CFILES): Add micromips-opc.c. * configure.in (bfd_mips_arch): Add micromips-opc.lo. * Makefile.in: Regenerate. * configure: Regenerate. * mips-dis.c (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_n_map): New macro.
2011-07-22Add initial Intel K1OM support.H.J. Lu1-1/+1
bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-06-13 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.Nick Clifton1-0/+2
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-02-13Remove freebsd1 from libtool.m4 macros and config.rpath.Ralf Wildenhues1-10/+2
/: Import from Libtool and gnulib: 2011-01-27 Gerald Pfeifer <gerald@pfeifer.com> Prepare for supporting FreeBSD 10. * config.rpath: Remove handling of freebsd1* which soon would match FreeBSD 10.0. 2011-01-20 Gerald Pfeifer <gerald@pfeifer.com> (tiny change) Remove support for FreeBSD 1.x. * libtool.m4 (_LT_LINKER_SHLIBS) (_LT_SYS_DYNAMIC_LINKER): Remove handling of freebsd1* which soon would incorrectly match FreeBSD 10.0. bfd/: * configure: Regenerate. gas/: * configure: Regenerate. ld/: * configure: Regenerate. opcodes/: * configure: Regenerate. binutils/: * configure: Regenerate. gprof/: * configure: Regenerate.
2010-09-27Fix unportable shell quoting.Ralf Wildenhues1-1/+1
/: Sync from GCC: PR bootstrap/44621 * configure.ac: Fix unportable shell quoting. * configure: Regenerate. config/: * po.m4 (AM_PO_SUBDIRS): Fix unportable shell quoting. bfd/: * configure: Regenerate. gas/: * configure: Regenerate. gold/: * configure: Regenerate. intl/: * configure: Regenerate. ld/: * configure: Regenerate. opcodes/: * configure: Regenerate. binutils/: * configure: Regenerate. gprof/: * configure: Regenerate.
2010-06-29remove maxq-coff portAlan Modra1-7/+12
2010-04-07 * configure: Regenerate.Alan Modra1-2/+14
2010-03-25bfd:Joseph Myers1-0/+1
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
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