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AgeCommit message (Expand)AuthorFilesLines
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-3/+2
2022-10-31sim: reg: constify store helperMike Frysinger1-1/+2
2022-10-31sim: common: change sim_read & sim_write to use void* buffersMike Frysinger1-2/+2
2022-10-28include: Define macro to ignore -Wdeprecated-declarations on GCCTsukasa OI1-0/+3
2022-10-27PowerPC: Add support for RFC02653 - Dense Math FacilityPeter Bergner1-15/+18
2022-10-19aarch64-pe support for LD, GAS and BFDJedidiah Thompson1-0/+22
2022-10-14e200 LSP supportAlan Modra1-0/+5
2022-10-14RISC-V: Move certain arrays to riscv-opc.cTsukasa OI1-11/+2
2022-10-04RISC-V: Fix buffer overflow on print_insn_riscvTsukasa OI1-0/+2
2022-10-04RISC-V: Renamed INSN_CLASS for floating point in integer extensions.Nelson Chu1-7/+7
2022-10-04RISC-V/gas: allow generating up to 176-bit instructions with .insnJan Beulich1-0/+3
2022-10-03Fix self-move warning check for GCC 13+Jan-Benedict Glaw2-0/+8
2022-09-30LoongArch: Update ELF e_flags handling according to specification.liuzhensong1-23/+21
2022-09-23Support AT_USRSTACKBASE and AT_USRSTACKLIM.John Baldwin1-0/+2
2022-09-23RISC-V: Add Zawrs ISA extension supportChristoph Müllner2-0/+9
2022-09-22RISC-V: Add T-Head MemPair vendor extensionChristoph Müllner2-0/+18
2022-09-22RISC-V: Add T-Head MemIdx vendor extensionChristoph Müllner2-0/+135
2022-09-22RISC-V: Add T-Head FMemIdx vendor extensionChristoph Müllner2-0/+27
2022-09-22RISC-V: Add T-Head MAC vendor extensionChristoph Müllner2-0/+21
2022-09-22RISC-V: Add T-Head CondMov vendor extensionChristoph Müllner2-0/+9
2022-09-22RISC-V: Add T-Head Bitmanip vendor extensionChristoph Müllner2-0/+42
2022-09-22RISC-V: Add support for arbitrary immediate encoding formatsChristoph Müllner1-0/+17
2022-09-22RISC-V: Add T-Head SYNC vendor extensionChristoph Müllner2-0/+18
2022-09-22RISC-V: Add T-Head CMO vendor extensionChristoph Müllner2-0/+66
2022-09-22include: Add macro to ignore -Wunused-but-set-variableTsukasa OI1-0/+14
2022-09-22include: Add macro to ignore -Wuser-defined-warningsTsukasa OI1-0/+9
2022-09-21gdbsupport: move include/gdb/fileio.h contents to fileio.hSimon Marchi1-144/+0
2022-09-21RISC-V: Implement Ztso extensionShihua1-0/+3
2022-09-12ppc: Document the -mfuture and -Mfuture options and make them usablePeter Bergner1-0/+3
2022-09-06opcodes: Add non-enum disassembler optionsTsukasa OI1-1/+2
2022-08-30RISC-V: Add 'Zmmul' extension in assembler.Tsukasa OI1-0/+1
2022-08-11ppc/svp64: introduce non-zero operand flagDmitry Selyutin1-0/+5
2022-08-11ppc/svp64: support LibreSOC architectureDmitry Selyutin1-0/+3
2022-08-10RISC-V: Remove R_RISCV_GNU_VTINHERIT/R_RISCV_GNU_VTENTRYFangrui Song1-2/+0
2022-08-10bfd: Add support for LoongArch64 EFI (efi-*-loongarch64).Youling Tang2-0/+62
2022-08-02Add ELFCOMPRESS_ZSTD.Cary Coutant1-0/+2
2022-07-29libopcodes/aarch64: add support for disassembler stylingAndrew Burgess1-1/+27
2022-07-25opcodes: add new sub-mnemonic disassembler styleAndrew Burgess1-0/+7
2022-07-25bfd: Delete R_LARCH_NONE from dyn info of LoongArch.liuzhensong1-1/+4
2022-07-25bfd: Add supported for LoongArch new relocations.liuzhensong1-0/+136
2022-07-19[AArch64] Support AArch64 MTE memory tag dumps in core filesLuis Machado1-0/+3
2022-07-12LTO plugin: sync header file with GCCMartin Liska1-0/+33
2022-07-08Add markers for 2.39 branchNick Clifton1-0/+4
2022-07-07RISC-V: Added Zfhmin and Zhinxmin.Tsukasa OI1-3/+4
2022-06-29opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess1-1/+1
2022-06-28RISC-V: Add 'Sstc' extension and its CSRsTsukasa OI1-0/+10
2022-06-28RISC-V: Add 'Sscofpmf' extension with its CSRsTsukasa OI1-0/+62
2022-06-28RISC-V: Add 'Smstateen' extension and its CSRsTsukasa OI1-0/+42
2022-06-27drop XC16x bitsJan Beulich1-40/+0
2022-06-22RISC-V: Use single h extension to control hypervisor CSRs and instructions.Nelson Chu2-25/+26
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